[uClinux-dev] [PATCH 03/22] m68knommu: switch to GPIO init macros in ColdFire 520x init code

Discussion:

gerg

2012-04-26 00:25:43 UTC

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gerg

2012-04-26 00:25:42 UTC

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gerg

2012-04-26 00:25:41 UTC

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From: Greg Ungerer <gerg at uclinux.org>

We have very large tables in the ColdFire CPU GPIO setup code that essentially
boil down to 2 distinct types of GPIO pin initiaization. Using 2 macros we can
reduce these large tables to at most a dozen lines of setup code, and in quite
a few cases a single table entry.

Introduce these 2 macros into the existing mcfgpio.h header.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/include/asm/mcfgpio.h | 41 +++++++++++++++++++++++++++++++++++++++
1 files changed, 41 insertions(+), 0 deletions(-)

diff --git a/arch/m68k/include/asm/mcfgpio.h b/arch/m68k/include/asm/mcfgpio.h
index ee5e4cc..148f56a 100644
--- a/arch/m68k/include/asm/mcfgpio.h
+++ b/arch/m68k/include/asm/mcfgpio.h
@@ -37,4 +37,45 @@ void mcf_gpio_set_value_fast(struct gpio_chip *, unsigned, int);
int mcf_gpio_request(struct gpio_chip *, unsigned);
void mcf_gpio_free(struct gpio_chip *, unsigned);

+/*
+ * Define macros to ease the pain of setting up the gpio tables.
+ */
+#define MCFGPS(mlabel, mbase, mngpio, mpddr, mpodr, mppdr) \
+ { \
+ .gpio_chip = { \
+ .label = #mlabel, \
+ .request = mcf_gpio_request, \
+ .free = mcf_gpio_free, \
+ .direction_input = mcf_gpio_direction_input, \
+ .direction_output = mcf_gpio_direction_output,\
+ .get = mcf_gpio_get_value, \
+ .set = mcf_gpio_set_value, \
+ .base = mbase, \
+ .ngpio = mngpio, \
+ }, \
+ .pddr = (void __iomem *) mpddr, \
+ .podr = (void __iomem *) mpodr, \
+ .ppdr = (void __iomem *) mppdr, \
+ }
+
+#define MCFGPF(mlabel, mbase, mngpio) \
+ { \
+ .gpio_chip = { \
+ .label = #mlabel, \
+ .request = mcf_gpio_request, \
+ .free = mcf_gpio_free, \
+ .direction_input = mcf_gpio_direction_input, \
+ .direction_output = mcf_gpio_direction_output,\
+ .get = mcf_gpio_get_value, \
+ .set = mcf_gpio_set_value_fast, \
+ .base = mbase, \
+ .ngpio = mngpio, \
+ }, \
+ .pddr = (void __iomem *) MCFGPIO_PDDR_##mlabel, \
+ .podr = (void __iomem *) MCFGPIO_PODR_##mlabel, \
+ .ppdr = (void __iomem *) MCFGPIO_PPDSDR_##mlabel, \
+ .setr = (void __iomem *) MCFGPIO_PPDSDR_##mlabel, \
+ .clrr = (void __iomem *) MCFGPIO_PCLRR_##mlabel, \
+ }
+
#endif
--
1.7.0.4

Philippe De Muyter

2012-04-26 07:16:10 UTC

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Hi Greg,

On Thu, Apr 26, 2012 at 10:25:41AM +1000, gerg at snapgear.com wrote:
> From: Greg Ungerer <gerg at uclinux.org>
>
> We have very large tables in the ColdFire CPU GPIO setup code that essentially
> boil down to 2 distinct types of GPIO pin initiaization. Using 2 macros we can
> reduce these large tables to at most a dozen lines of setup code, and in quite
> a few cases a single table entry.
>
> Introduce these 2 macros into the existing mcfgpio.h header.
...
> +/*
> + * Define macros to ease the pain of setting up the gpio tables.
> + */
> +#define MCFGPS(mlabel, mbase, mngpio, mpddr, mpodr, mppdr) \
...
> +#define MCFGPF(mlabel, mbase, mngpio) \
...

Maybe a small comment to explain when to use MCFGPS and when to use MCFGPF ?

Best regards

Philippe

Greg Ungerer

2012-04-26 09:59:23 UTC

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Hi Philippe,

On 04/26/2012 05:16 PM, Philippe De Muyter wrote:
> Hi Greg,
>
> On Thu, Apr 26, 2012 at 10:25:41AM +1000, gerg at snapgear.com wrote:
>> From: Greg Ungerer<gerg at uclinux.org>
>>
>> We have very large tables in the ColdFire CPU GPIO setup code that essentially
>> boil down to 2 distinct types of GPIO pin initiaization. Using 2 macros we can
>> reduce these large tables to at most a dozen lines of setup code, and in quite
>> a few cases a single table entry.
>>
>> Introduce these 2 macros into the existing mcfgpio.h header.
> ...
>> +/*
>> + * Define macros to ease the pain of setting up the gpio tables.
>> + */
>> +#define MCFGPS(mlabel, mbase, mngpio, mpddr, mpodr, mppdr) \
> ...
>> +#define MCFGPF(mlabel, mbase, mngpio) \
> ...
>
> Maybe a small comment to explain when to use MCFGPS and when to use MCFGPF ?

Yep, that sounds like a good idea. I'll do that.

Thanks
Greg

------------------------------------------------------------------------
Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
SnapGear Group, McAfee PHONE: +61 7 3435 2888
8 Gardner Close, FAX: +61 7 3891 3630
Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com

gerg

2012-04-26 00:25:44 UTC

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gerg

2012-04-26 00:25:46 UTC

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gerg

2012-04-26 00:25:45 UTC

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gerg

2012-04-26 00:25:47 UTC

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From: Greg Ungerer <gerg at uclinux.org>

Modify the GPIO setup table to use the mcfgpio.h macros for table init.
Simplifies code and reduces line count significantly.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/platform/527x/gpio.c | 604 +++-------------------------------------
1 files changed, 32 insertions(+), 572 deletions(-)

diff --git a/arch/m68k/platform/527x/gpio.c b/arch/m68k/platform/527x/gpio.c
index 205da0a..b612a63 100644
--- a/arch/m68k/platform/527x/gpio.c
+++ b/arch/m68k/platform/527x/gpio.c
@@ -22,579 +22,39 @@

static struct mcf_gpio_chip mcf_gpio_chips[] = {
#if defined(CONFIG_M5271)
- {
- .gpio_chip = {
- .label = "PIRQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .base = 1,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFEPORT_EPDDR,
- .podr = (void __iomem *) MCFEPORT_EPDR,
- .ppdr = (void __iomem *) MCFEPORT_EPPDR,
- },
- {
- .gpio_chip = {
- .label = "ADDR",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 13,
- .ngpio = 3,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
- .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
- },
- {
- .gpio_chip = {
- .label = "DATAH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 16,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_DATAH,
- .podr = (void __iomem *) MCFGPIO_PODR_DATAH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAH,
- },
- {
- .gpio_chip = {
- .label = "DATAL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 24,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_DATAL,
- .podr = (void __iomem *) MCFGPIO_PODR_DATAL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_DATAL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_DATAL,
- },
- {
- .gpio_chip = {
- .label = "BUSCTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 32,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
- .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
- },
- {
- .gpio_chip = {
- .label = "BS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 40,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
- .podr = (void __iomem *) MCFGPIO_PODR_BS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
- },
- {
- .gpio_chip = {
- .label = "CS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 49,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
- .podr = (void __iomem *) MCFGPIO_PODR_CS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
- },
- {
- .gpio_chip = {
- .label = "SDRAM",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 56,
- .ngpio = 6,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
- .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
- },
- {
- .gpio_chip = {
- .label = "FECI2C",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 64,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
- .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
- },
- {
- .gpio_chip = {
- .label = "UARTH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 72,
- .ngpio = 2,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
- .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
- },
- {
- .gpio_chip = {
- .label = "UARTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 80,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
- .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
- },
- {
- .gpio_chip = {
- .label = "QSPI",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 88,
- .ngpio = 5,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
- .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
- },
- {
- .gpio_chip = {
- .label = "TIMER",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 96,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_TIMER,
- .podr = (void __iomem *) MCFGPIO_PODR_TIMER,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMER,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMER,
- },
+ MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(ADDR, 13, 3),
+ MCFGPF(DATAH, 16, 8),
+ MCFGPF(DATAL, 24, 8),
+ MCFGPF(BUSCTL, 32, 8),
+ MCFGPF(BS, 40, 4),
+ MCFGPF(CS, 49, 7),
+ MCFGPF(SDRAM, 56, 6),
+ MCFGPF(FECI2C, 64, 4),
+ MCFGPF(UARTH, 72, 2),
+ MCFGPF(UARTL, 80, 8),
+ MCFGPF(QSPI, 88, 5),
+ MCFGPF(TIMER, 96, 8),
#elif defined(CONFIG_M5275)
- {
- .gpio_chip = {
- .label = "PIRQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .base = 1,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFEPORT_EPDDR,
- .podr = (void __iomem *) MCFEPORT_EPDR,
- .ppdr = (void __iomem *) MCFEPORT_EPPDR,
- },
- {
- .gpio_chip = {
- .label = "BUSCTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 8,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BUSCTL,
- .podr = (void __iomem *) MCFGPIO_PODR_BUSCTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BUSCTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BUSCTL,
- },
- {
- .gpio_chip = {
- .label = "ADDR",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 21,
- .ngpio = 3,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_ADDR,
- .podr = (void __iomem *) MCFGPIO_PODR_ADDR,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_ADDR,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_ADDR,
- },
- {
- .gpio_chip = {
- .label = "CS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 25,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_CS,
- .podr = (void __iomem *) MCFGPIO_PODR_CS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_CS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_CS,
- },
- {
- .gpio_chip = {
- .label = "FEC0H",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 32,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FEC0H,
- .podr = (void __iomem *) MCFGPIO_PODR_FEC0H,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC0H,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC0H,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC0H,
- },
- {
- .gpio_chip = {
- .label = "FEC0L",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 40,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FEC0L,
- .podr = (void __iomem *) MCFGPIO_PODR_FEC0L,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC0L,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC0L,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC0L,
- },
- {
- .gpio_chip = {
- .label = "FECI2C",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 48,
- .ngpio = 6,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FECI2C,
- .podr = (void __iomem *) MCFGPIO_PODR_FECI2C,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FECI2C,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FECI2C,
- },
- {
- .gpio_chip = {
- .label = "QSPI",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 56,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_QSPI,
- .podr = (void __iomem *) MCFGPIO_PODR_QSPI,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_QSPI,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_QSPI,
- },
- {
- .gpio_chip = {
- .label = "SDRAM",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 64,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_SDRAM,
- .podr = (void __iomem *) MCFGPIO_PODR_SDRAM,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_SDRAM,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_SDRAM,
- },
- {
- .gpio_chip = {
- .label = "TIMERH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 72,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_TIMERH,
- .podr = (void __iomem *) MCFGPIO_PODR_TIMERH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMERH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMERH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMERH,
- },
- {
- .gpio_chip = {
- .label = "TIMERL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 80,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_TIMERL,
- .podr = (void __iomem *) MCFGPIO_PODR_TIMERL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_TIMERL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_TIMERL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_TIMERL,
- },
- {
- .gpio_chip = {
- .label = "UARTL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 88,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UARTL,
- .podr = (void __iomem *) MCFGPIO_PODR_UARTL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTL,
- },
- {
- .gpio_chip = {
- .label = "FEC1H",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 96,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FEC1H,
- .podr = (void __iomem *) MCFGPIO_PODR_FEC1H,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC1H,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC1H,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC1H,
- },
- {
- .gpio_chip = {
- .label = "FEC1L",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 104,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_FEC1L,
- .podr = (void __iomem *) MCFGPIO_PODR_FEC1L,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_FEC1L,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_FEC1L,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_FEC1L,
- },
- {
- .gpio_chip = {
- .label = "BS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 114,
- .ngpio = 2,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_BS,
- .podr = (void __iomem *) MCFGPIO_PODR_BS,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_BS,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_BS,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_BS,
- },
- {
- .gpio_chip = {
- .label = "IRQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 121,
- .ngpio = 7,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_IRQ,
- .podr = (void __iomem *) MCFGPIO_PODR_IRQ,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_IRQ,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_IRQ,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_IRQ,
- },
- {
- .gpio_chip = {
- .label = "USBH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 128,
- .ngpio = 1,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_USBH,
- .podr = (void __iomem *) MCFGPIO_PODR_USBH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_USBH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_USBH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_USBH,
- },
- {
- .gpio_chip = {
- .label = "USBL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 136,
- .ngpio = 8,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_USBL,
- .podr = (void __iomem *) MCFGPIO_PODR_USBL,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_USBL,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_USBL,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_USBL,
- },
- {
- .gpio_chip = {
- .label = "UARTH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 144,
- .ngpio = 4,
- },
- .pddr = (void __iomem *) MCFGPIO_PDDR_UARTH,
- .podr = (void __iomem *) MCFGPIO_PODR_UARTH,
- .ppdr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
- .setr = (void __iomem *) MCFGPIO_PPDSDR_UARTH,
- .clrr = (void __iomem *) MCFGPIO_PCLRR_UARTH,
- },
+ MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(BUSCTL, 8, 8),
+ MCFGPF(ADDR, 21, 3),
+ MCFGPF(CS, 25, 7),
+ MCFGPF(FEC0H, 32, 8),
+ MCFGPF(FEC0L, 40, 8),
+ MCFGPF(FECI2C, 48, 6),
+ MCFGPF(QSPI, 56, 7),
+ MCFGPF(SDRAM, 64, 8),
+ MCFGPF(TIMERH, 72, 4),
+ MCFGPF(TIMERL, 80, 4),
+ MCFGPF(UARTL, 88, 8),
+ MCFGPF(FEC1H, 96, 8),
+ MCFGPF(FEC1L, 104, 8),
+ MCFGPF(BS, 114, 2),
+ MCFGPF(IRQ, 121, 7),
+ MCFGPF(USBH, 128, 1),
+ MCFGPF(USBL, 136, 8),
+ MCFGPF(UARTH, 144, 4),
#endif
};

--
1.7.0.4

gerg

2012-04-26 00:25:50 UTC

Permalink

gerg

2012-04-26 00:25:48 UTC

Permalink

From: Greg Ungerer <gerg at uclinux.org>

Modify the GPIO setup table to use the mcfgpio.h macros for table init.
Simplifies code and reduces line count significantly.

We also need to rename some of the GPIO registers to be consistent with
all other ColdFire parts (we can't use the new GPIO macros otherwise).

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/include/asm/m528xsim.h | 179 +++++++---------
arch/m68k/platform/528x/gpio.c | 427 ++------------------------------------
2 files changed, 103 insertions(+), 503 deletions(-)

diff --git a/arch/m68k/include/asm/m528xsim.h b/arch/m68k/include/asm/m528xsim.h
index 569476f..d63b99f 100644
--- a/arch/m68k/include/asm/m528xsim.h
+++ b/arch/m68k/include/asm/m528xsim.h
@@ -97,100 +97,81 @@
/*
* GPIO registers
*/
-#define MCFGPIO_PORTA (MCF_IPSBAR + 0x00100000)
-#define MCFGPIO_PORTB (MCF_IPSBAR + 0x00100001)
-#define MCFGPIO_PORTC (MCF_IPSBAR + 0x00100002)
-#define MCFGPIO_PORTD (MCF_IPSBAR + 0x00100003)
-#define MCFGPIO_PORTE (MCF_IPSBAR + 0x00100004)
-#define MCFGPIO_PORTF (MCF_IPSBAR + 0x00100005)
-#define MCFGPIO_PORTG (MCF_IPSBAR + 0x00100006)
-#define MCFGPIO_PORTH (MCF_IPSBAR + 0x00100007)
-#define MCFGPIO_PORTJ (MCF_IPSBAR + 0x00100008)
-#define MCFGPIO_PORTDD (MCF_IPSBAR + 0x00100009)
-#define MCFGPIO_PORTEH (MCF_IPSBAR + 0x0010000A)
-#define MCFGPIO_PORTEL (MCF_IPSBAR + 0x0010000B)
-#define MCFGPIO_PORTAS (MCF_IPSBAR + 0x0010000C)
-#define MCFGPIO_PORTQS (MCF_IPSBAR + 0x0010000D)
-#define MCFGPIO_PORTSD (MCF_IPSBAR + 0x0010000E)
-#define MCFGPIO_PORTTC (MCF_IPSBAR + 0x0010000F)
-#define MCFGPIO_PORTTD (MCF_IPSBAR + 0x00100010)
-#define MCFGPIO_PORTUA (MCF_IPSBAR + 0x00100011)
-
-#define MCFGPIO_DDRA (MCF_IPSBAR + 0x00100014)
-#define MCFGPIO_DDRB (MCF_IPSBAR + 0x00100015)
-#define MCFGPIO_DDRC (MCF_IPSBAR + 0x00100016)
-#define MCFGPIO_DDRD (MCF_IPSBAR + 0x00100017)
-#define MCFGPIO_DDRE (MCF_IPSBAR + 0x00100018)
-#define MCFGPIO_DDRF (MCF_IPSBAR + 0x00100019)
-#define MCFGPIO_DDRG (MCF_IPSBAR + 0x0010001A)
-#define MCFGPIO_DDRH (MCF_IPSBAR + 0x0010001B)
-#define MCFGPIO_DDRJ (MCF_IPSBAR + 0x0010001C)
-#define MCFGPIO_DDRDD (MCF_IPSBAR + 0x0010001D)
-#define MCFGPIO_DDREH (MCF_IPSBAR + 0x0010001E)
-#define MCFGPIO_DDREL (MCF_IPSBAR + 0x0010001F)
-#define MCFGPIO_DDRAS (MCF_IPSBAR + 0x00100020)
-#define MCFGPIO_DDRQS (MCF_IPSBAR + 0x00100021)
-#define MCFGPIO_DDRSD (MCF_IPSBAR + 0x00100022)
-#define MCFGPIO_DDRTC (MCF_IPSBAR + 0x00100023)
-#define MCFGPIO_DDRTD (MCF_IPSBAR + 0x00100024)
-#define MCFGPIO_DDRUA (MCF_IPSBAR + 0x00100025)
-
-#define MCFGPIO_PORTAP (MCF_IPSBAR + 0x00100028)
-#define MCFGPIO_PORTBP (MCF_IPSBAR + 0x00100029)
-#define MCFGPIO_PORTCP (MCF_IPSBAR + 0x0010002A)
-#define MCFGPIO_PORTDP (MCF_IPSBAR + 0x0010002B)
-#define MCFGPIO_PORTEP (MCF_IPSBAR + 0x0010002C)
-#define MCFGPIO_PORTFP (MCF_IPSBAR + 0x0010002D)
-#define MCFGPIO_PORTGP (MCF_IPSBAR + 0x0010002E)
-#define MCFGPIO_PORTHP (MCF_IPSBAR + 0x0010002F)
-#define MCFGPIO_PORTJP (MCF_IPSBAR + 0x00100030)
-#define MCFGPIO_PORTDDP (MCF_IPSBAR + 0x00100031)
-#define MCFGPIO_PORTEHP (MCF_IPSBAR + 0x00100032)
-#define MCFGPIO_PORTELP (MCF_IPSBAR + 0x00100033)
-#define MCFGPIO_PORTASP (MCF_IPSBAR + 0x00100034)
-#define MCFGPIO_PORTQSP (MCF_IPSBAR + 0x00100035)
-#define MCFGPIO_PORTSDP (MCF_IPSBAR + 0x00100036)
-#define MCFGPIO_PORTTCP (MCF_IPSBAR + 0x00100037)
-#define MCFGPIO_PORTTDP (MCF_IPSBAR + 0x00100038)
-#define MCFGPIO_PORTUAP (MCF_IPSBAR + 0x00100039)
-
-#define MCFGPIO_SETA (MCF_IPSBAR + 0x00100028)
-#define MCFGPIO_SETB (MCF_IPSBAR + 0x00100029)
-#define MCFGPIO_SETC (MCF_IPSBAR + 0x0010002A)
-#define MCFGPIO_SETD (MCF_IPSBAR + 0x0010002B)
-#define MCFGPIO_SETE (MCF_IPSBAR + 0x0010002C)
-#define MCFGPIO_SETF (MCF_IPSBAR + 0x0010002D)
-#define MCFGPIO_SETG (MCF_IPSBAR + 0x0010002E)
-#define MCFGPIO_SETH (MCF_IPSBAR + 0x0010002F)
-#define MCFGPIO_SETJ (MCF_IPSBAR + 0x00100030)
-#define MCFGPIO_SETDD (MCF_IPSBAR + 0x00100031)
-#define MCFGPIO_SETEH (MCF_IPSBAR + 0x00100032)
-#define MCFGPIO_SETEL (MCF_IPSBAR + 0x00100033)
-#define MCFGPIO_SETAS (MCF_IPSBAR + 0x00100034)
-#define MCFGPIO_SETQS (MCF_IPSBAR + 0x00100035)
-#define MCFGPIO_SETSD (MCF_IPSBAR + 0x00100036)
-#define MCFGPIO_SETTC (MCF_IPSBAR + 0x00100037)
-#define MCFGPIO_SETTD (MCF_IPSBAR + 0x00100038)
-#define MCFGPIO_SETUA (MCF_IPSBAR + 0x00100039)
-
-#define MCFGPIO_CLRA (MCF_IPSBAR + 0x0010003C)
-#define MCFGPIO_CLRB (MCF_IPSBAR + 0x0010003D)
-#define MCFGPIO_CLRC (MCF_IPSBAR + 0x0010003E)
-#define MCFGPIO_CLRD (MCF_IPSBAR + 0x0010003F)
-#define MCFGPIO_CLRE (MCF_IPSBAR + 0x00100040)
-#define MCFGPIO_CLRF (MCF_IPSBAR + 0x00100041)
-#define MCFGPIO_CLRG (MCF_IPSBAR + 0x00100042)
-#define MCFGPIO_CLRH (MCF_IPSBAR + 0x00100043)
-#define MCFGPIO_CLRJ (MCF_IPSBAR + 0x00100044)
-#define MCFGPIO_CLRDD (MCF_IPSBAR + 0x00100045)
-#define MCFGPIO_CLREH (MCF_IPSBAR + 0x00100046)
-#define MCFGPIO_CLREL (MCF_IPSBAR + 0x00100047)
-#define MCFGPIO_CLRAS (MCF_IPSBAR + 0x00100048)
-#define MCFGPIO_CLRQS (MCF_IPSBAR + 0x00100049)
-#define MCFGPIO_CLRSD (MCF_IPSBAR + 0x0010004A)
-#define MCFGPIO_CLRTC (MCF_IPSBAR + 0x0010004B)
-#define MCFGPIO_CLRTD (MCF_IPSBAR + 0x0010004C)
-#define MCFGPIO_CLRUA (MCF_IPSBAR + 0x0010004D)
+#define MCFGPIO_PODR_A (MCF_IPSBAR + 0x00100000)
+#define MCFGPIO_PODR_B (MCF_IPSBAR + 0x00100001)
+#define MCFGPIO_PODR_C (MCF_IPSBAR + 0x00100002)
+#define MCFGPIO_PODR_D (MCF_IPSBAR + 0x00100003)
+#define MCFGPIO_PODR_E (MCF_IPSBAR + 0x00100004)
+#define MCFGPIO_PODR_F (MCF_IPSBAR + 0x00100005)
+#define MCFGPIO_PODR_G (MCF_IPSBAR + 0x00100006)
+#define MCFGPIO_PODR_H (MCF_IPSBAR + 0x00100007)
+#define MCFGPIO_PODR_J (MCF_IPSBAR + 0x00100008)
+#define MCFGPIO_PODR_DD (MCF_IPSBAR + 0x00100009)
+#define MCFGPIO_PODR_EH (MCF_IPSBAR + 0x0010000A)
+#define MCFGPIO_PODR_EL (MCF_IPSBAR + 0x0010000B)
+#define MCFGPIO_PODR_AS (MCF_IPSBAR + 0x0010000C)
+#define MCFGPIO_PODR_QS (MCF_IPSBAR + 0x0010000D)
+#define MCFGPIO_PODR_SD (MCF_IPSBAR + 0x0010000E)
+#define MCFGPIO_PODR_TC (MCF_IPSBAR + 0x0010000F)
+#define MCFGPIO_PODR_TD (MCF_IPSBAR + 0x00100010)
+#define MCFGPIO_PODR_UA (MCF_IPSBAR + 0x00100011)
+
+#define MCFGPIO_PDDR_A (MCF_IPSBAR + 0x00100014)
+#define MCFGPIO_PDDR_B (MCF_IPSBAR + 0x00100015)
+#define MCFGPIO_PDDR_C (MCF_IPSBAR + 0x00100016)
+#define MCFGPIO_PDDR_D (MCF_IPSBAR + 0x00100017)
+#define MCFGPIO_PDDR_E (MCF_IPSBAR + 0x00100018)
+#define MCFGPIO_PDDR_F (MCF_IPSBAR + 0x00100019)
+#define MCFGPIO_PDDR_G (MCF_IPSBAR + 0x0010001A)
+#define MCFGPIO_PDDR_H (MCF_IPSBAR + 0x0010001B)
+#define MCFGPIO_PDDR_J (MCF_IPSBAR + 0x0010001C)
+#define MCFGPIO_PDDR_DD (MCF_IPSBAR + 0x0010001D)
+#define MCFGPIO_PDDR_EH (MCF_IPSBAR + 0x0010001E)
+#define MCFGPIO_PDDR_EL (MCF_IPSBAR + 0x0010001F)
+#define MCFGPIO_PDDR_AS (MCF_IPSBAR + 0x00100020)
+#define MCFGPIO_PDDR_QS (MCF_IPSBAR + 0x00100021)
+#define MCFGPIO_PDDR_SD (MCF_IPSBAR + 0x00100022)
+#define MCFGPIO_PDDR_TC (MCF_IPSBAR + 0x00100023)
+#define MCFGPIO_PDDR_TD (MCF_IPSBAR + 0x00100024)
+#define MCFGPIO_PDDR_UA (MCF_IPSBAR + 0x00100025)
+
+#define MCFGPIO_PPDSDR_A (MCF_IPSBAR + 0x00100028)
+#define MCFGPIO_PPDSDR_B (MCF_IPSBAR + 0x00100029)
+#define MCFGPIO_PPDSDR_C (MCF_IPSBAR + 0x0010002A)
+#define MCFGPIO_PPDSDR_D (MCF_IPSBAR + 0x0010002B)
+#define MCFGPIO_PPDSDR_E (MCF_IPSBAR + 0x0010002C)
+#define MCFGPIO_PPDSDR_F (MCF_IPSBAR + 0x0010002D)
+#define MCFGPIO_PPDSDR_G (MCF_IPSBAR + 0x0010002E)
+#define MCFGPIO_PPDSDR_H (MCF_IPSBAR + 0x0010002F)
+#define MCFGPIO_PPDSDR_J (MCF_IPSBAR + 0x00100030)
+#define MCFGPIO_PPDSDR_DD (MCF_IPSBAR + 0x00100031)
+#define MCFGPIO_PPDSDR_EH (MCF_IPSBAR + 0x00100032)
+#define MCFGPIO_PPDSDR_EL (MCF_IPSBAR + 0x00100033)
+#define MCFGPIO_PPDSDR_AS (MCF_IPSBAR + 0x00100034)
+#define MCFGPIO_PPDSDR_QS (MCF_IPSBAR + 0x00100035)
+#define MCFGPIO_PPDSDR_SD (MCF_IPSBAR + 0x00100036)
+#define MCFGPIO_PPDSDR_TC (MCF_IPSBAR + 0x00100037)
+#define MCFGPIO_PPDSDR_TD (MCF_IPSBAR + 0x00100038)
+#define MCFGPIO_PPDSDR_UA (MCF_IPSBAR + 0x00100039)
+
+#define MCFGPIO_PCLRR_A (MCF_IPSBAR + 0x0010003C)
+#define MCFGPIO_PCLRR_B (MCF_IPSBAR + 0x0010003D)
+#define MCFGPIO_PCLRR_C (MCF_IPSBAR + 0x0010003E)
+#define MCFGPIO_PCLRR_D (MCF_IPSBAR + 0x0010003F)
+#define MCFGPIO_PCLRR_E (MCF_IPSBAR + 0x00100040)
+#define MCFGPIO_PCLRR_F (MCF_IPSBAR + 0x00100041)
+#define MCFGPIO_PCLRR_G (MCF_IPSBAR + 0x00100042)
+#define MCFGPIO_PCLRR_H (MCF_IPSBAR + 0x00100043)
+#define MCFGPIO_PCLRR_J (MCF_IPSBAR + 0x00100044)
+#define MCFGPIO_PCLRR_DD (MCF_IPSBAR + 0x00100045)
+#define MCFGPIO_PCLRR_EH (MCF_IPSBAR + 0x00100046)
+#define MCFGPIO_PCLRR_EL (MCF_IPSBAR + 0x00100047)
+#define MCFGPIO_PCLRR_AS (MCF_IPSBAR + 0x00100048)
+#define MCFGPIO_PCLRR_QS (MCF_IPSBAR + 0x00100049)
+#define MCFGPIO_PCLRR_SD (MCF_IPSBAR + 0x0010004A)
+#define MCFGPIO_PCLRR_TC (MCF_IPSBAR + 0x0010004B)
+#define MCFGPIO_PCLRR_TD (MCF_IPSBAR + 0x0010004C)
+#define MCFGPIO_PCLRR_UA (MCF_IPSBAR + 0x0010004D)

#define MCFGPIO_PBCDPAR (MCF_IPSBAR + 0x00100050)
#define MCFGPIO_PFPAR (MCF_IPSBAR + 0x00100051)
@@ -242,11 +223,11 @@
* definitions for generic gpio support
*
*/
-#define MCFGPIO_PODR MCFGPIO_PORTA /* port output data */
-#define MCFGPIO_PDDR MCFGPIO_DDRA /* port data direction */
-#define MCFGPIO_PPDR MCFGPIO_PORTAP /* port pin data */
-#define MCFGPIO_SETR MCFGPIO_SETA /* set output */
-#define MCFGPIO_CLRR MCFGPIO_CLRA /* clr output */
+#define MCFGPIO_PODR MCFGPIO_PODR_A /* port output data */
+#define MCFGPIO_PDDR MCFGPIO_PDDR_A /* port data direction */
+#define MCFGPIO_PPDR MCFGPIO_PPDSDR_A/* port pin data */
+#define MCFGPIO_SETR MCFGPIO_PPDSDR_A/* set output */
+#define MCFGPIO_CLRR MCFGPIO_PCLRR_A /* clr output */

#define MCFGPIO_IRQ_MAX 8
#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
diff --git a/arch/m68k/platform/528x/gpio.c b/arch/m68k/platform/528x/gpio.c
index 526db66..f0e19d6 100644
--- a/arch/m68k/platform/528x/gpio.c
+++ b/arch/m68k/platform/528x/gpio.c
@@ -21,410 +21,29 @@
#include <asm/mcfgpio.h>

static struct mcf_gpio_chip mcf_gpio_chips[] = {
- {
- .gpio_chip = {
- .label = "NQ",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value,
- .base = 1,
- .ngpio = 7,
- },
- .pddr = (void __iomem *)MCFEPORT_EPDDR,
- .podr = (void __iomem *)MCFEPORT_EPDR,
- .ppdr = (void __iomem *)MCFEPORT_EPPDR,
- },
- {
- .gpio_chip = {
- .label = "TA",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 8,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFGPTA_GPTDDR,
- .podr = (void __iomem *)MCFGPTA_GPTPORT,
- .ppdr = (void __iomem *)MCFGPTB_GPTPORT,
- },
- {
- .gpio_chip = {
- .label = "TB",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 16,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFGPTB_GPTDDR,
- .podr = (void __iomem *)MCFGPTB_GPTPORT,
- .ppdr = (void __iomem *)MCFGPTB_GPTPORT,
- },
- {
- .gpio_chip = {
- .label = "QA",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 24,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFQADC_DDRQA,
- .podr = (void __iomem *)MCFQADC_PORTQA,
- .ppdr = (void __iomem *)MCFQADC_PORTQA,
- },
- {
- .gpio_chip = {
- .label = "QB",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 32,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFQADC_DDRQB,
- .podr = (void __iomem *)MCFQADC_PORTQB,
- .ppdr = (void __iomem *)MCFQADC_PORTQB,
- },
- {
- .gpio_chip = {
- .label = "A",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 40,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRA,
- .podr = (void __iomem *)MCFGPIO_PORTA,
- .ppdr = (void __iomem *)MCFGPIO_PORTAP,
- .setr = (void __iomem *)MCFGPIO_SETA,
- .clrr = (void __iomem *)MCFGPIO_CLRA,
- },
- {
- .gpio_chip = {
- .label = "B",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 48,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRB,
- .podr = (void __iomem *)MCFGPIO_PORTB,
- .ppdr = (void __iomem *)MCFGPIO_PORTBP,
- .setr = (void __iomem *)MCFGPIO_SETB,
- .clrr = (void __iomem *)MCFGPIO_CLRB,
- },
- {
- .gpio_chip = {
- .label = "C",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 56,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRC,
- .podr = (void __iomem *)MCFGPIO_PORTC,
- .ppdr = (void __iomem *)MCFGPIO_PORTCP,
- .setr = (void __iomem *)MCFGPIO_SETC,
- .clrr = (void __iomem *)MCFGPIO_CLRC,
- },
- {
- .gpio_chip = {
- .label = "D",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 64,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRD,
- .podr = (void __iomem *)MCFGPIO_PORTD,
- .ppdr = (void __iomem *)MCFGPIO_PORTDP,
- .setr = (void __iomem *)MCFGPIO_SETD,
- .clrr = (void __iomem *)MCFGPIO_CLRD,
- },
- {
- .gpio_chip = {
- .label = "E",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 72,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRE,
- .podr = (void __iomem *)MCFGPIO_PORTE,
- .ppdr = (void __iomem *)MCFGPIO_PORTEP,
- .setr = (void __iomem *)MCFGPIO_SETE,
- .clrr = (void __iomem *)MCFGPIO_CLRE,
- },
- {
- .gpio_chip = {
- .label = "F",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 80,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRF,
- .podr = (void __iomem *)MCFGPIO_PORTF,
- .ppdr = (void __iomem *)MCFGPIO_PORTFP,
- .setr = (void __iomem *)MCFGPIO_SETF,
- .clrr = (void __iomem *)MCFGPIO_CLRF,
- },
- {
- .gpio_chip = {
- .label = "G",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 88,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRG,
- .podr = (void __iomem *)MCFGPIO_PORTG,
- .ppdr = (void __iomem *)MCFGPIO_PORTGP,
- .setr = (void __iomem *)MCFGPIO_SETG,
- .clrr = (void __iomem *)MCFGPIO_CLRG,
- },
- {
- .gpio_chip = {
- .label = "H",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 96,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRH,
- .podr = (void __iomem *)MCFGPIO_PORTH,
- .ppdr = (void __iomem *)MCFGPIO_PORTHP,
- .setr = (void __iomem *)MCFGPIO_SETH,
- .clrr = (void __iomem *)MCFGPIO_CLRH,
- },
- {
- .gpio_chip = {
- .label = "J",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 104,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRJ,
- .podr = (void __iomem *)MCFGPIO_PORTJ,
- .ppdr = (void __iomem *)MCFGPIO_PORTJP,
- .setr = (void __iomem *)MCFGPIO_SETJ,
- .clrr = (void __iomem *)MCFGPIO_CLRJ,
- },
- {
- .gpio_chip = {
- .label = "DD",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 112,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRDD,
- .podr = (void __iomem *)MCFGPIO_PORTDD,
- .ppdr = (void __iomem *)MCFGPIO_PORTDDP,
- .setr = (void __iomem *)MCFGPIO_SETDD,
- .clrr = (void __iomem *)MCFGPIO_CLRDD,
- },
- {
- .gpio_chip = {
- .label = "EH",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 120,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDREH,
- .podr = (void __iomem *)MCFGPIO_PORTEH,
- .ppdr = (void __iomem *)MCFGPIO_PORTEHP,
- .setr = (void __iomem *)MCFGPIO_SETEH,
- .clrr = (void __iomem *)MCFGPIO_CLREH,
- },
- {
- .gpio_chip = {
- .label = "EL",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 128,
- .ngpio = 8,
- },
- .pddr = (void __iomem *)MCFGPIO_DDREL,
- .podr = (void __iomem *)MCFGPIO_PORTEL,
- .ppdr = (void __iomem *)MCFGPIO_PORTELP,
- .setr = (void __iomem *)MCFGPIO_SETEL,
- .clrr = (void __iomem *)MCFGPIO_CLREL,
- },
- {
- .gpio_chip = {
- .label = "AS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 136,
- .ngpio = 6,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRAS,
- .podr = (void __iomem *)MCFGPIO_PORTAS,
- .ppdr = (void __iomem *)MCFGPIO_PORTASP,
- .setr = (void __iomem *)MCFGPIO_SETAS,
- .clrr = (void __iomem *)MCFGPIO_CLRAS,
- },
- {
- .gpio_chip = {
- .label = "QS",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 144,
- .ngpio = 7,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRQS,
- .podr = (void __iomem *)MCFGPIO_PORTQS,
- .ppdr = (void __iomem *)MCFGPIO_PORTQSP,
- .setr = (void __iomem *)MCFGPIO_SETQS,
- .clrr = (void __iomem *)MCFGPIO_CLRQS,
- },
- {
- .gpio_chip = {
- .label = "SD",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 152,
- .ngpio = 6,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRSD,
- .podr = (void __iomem *)MCFGPIO_PORTSD,
- .ppdr = (void __iomem *)MCFGPIO_PORTSDP,
- .setr = (void __iomem *)MCFGPIO_SETSD,
- .clrr = (void __iomem *)MCFGPIO_CLRSD,
- },
- {
- .gpio_chip = {
- .label = "TC",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 160,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRTC,
- .podr = (void __iomem *)MCFGPIO_PORTTC,
- .ppdr = (void __iomem *)MCFGPIO_PORTTCP,
- .setr = (void __iomem *)MCFGPIO_SETTC,
- .clrr = (void __iomem *)MCFGPIO_CLRTC,
- },
- {
- .gpio_chip = {
- .label = "TD",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 168,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRTD,
- .podr = (void __iomem *)MCFGPIO_PORTTD,
- .ppdr = (void __iomem *)MCFGPIO_PORTTDP,
- .setr = (void __iomem *)MCFGPIO_SETTD,
- .clrr = (void __iomem *)MCFGPIO_CLRTD,
- },
- {
- .gpio_chip = {
- .label = "UA",
- .request = mcf_gpio_request,
- .free = mcf_gpio_free,
- .direction_input = mcf_gpio_direction_input,
- .direction_output = mcf_gpio_direction_output,
- .get = mcf_gpio_get_value,
- .set = mcf_gpio_set_value_fast,
- .base = 176,
- .ngpio = 4,
- },
- .pddr = (void __iomem *)MCFGPIO_DDRUA,
- .podr = (void __iomem *)MCFGPIO_PORTUA,
- .ppdr = (void __iomem *)MCFGPIO_PORTUAP,
- .setr = (void __iomem *)MCFGPIO_SETUA,
- .clrr = (void __iomem *)MCFGPIO_CLRUA,
- },
+ MCFGPS(NQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPS(TA, 8, 4, MCFGPTA_GPTDDR, MCFGPTA_GPTPORT, MCFGPTB_GPTPORT),
+ MCFGPS(TB, 16, 4, MCFGPTB_GPTDDR, MCFGPTB_GPTPORT, MCFGPTB_GPTPORT),
+ MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA),
+ MCFGPS(QA, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB),
+ MCFGPF(A, 40, 8),
+ MCFGPF(B, 48, 8),
+ MCFGPF(C, 56, 8),
+ MCFGPF(D, 64, 8),
+ MCFGPF(E, 72, 8),
+ MCFGPF(F, 80, 8),
+ MCFGPF(G, 88, 8),
+ MCFGPF(H, 96, 8),
+ MCFGPF(J, 104, 8),
+ MCFGPF(DD, 112, 8),
+ MCFGPF(EH, 120, 8),
+ MCFGPF(EL, 128, 8),
+ MCFGPF(AS, 136, 6),
+ MCFGPF(QS, 144, 7),
+ MCFGPF(SD, 152, 6),
+ MCFGPF(TC, 160, 4),
+ MCFGPF(TD, 168, 4),
+ MCFGPF(UA, 176, 4),
};

static int __init mcf_gpio_init(void)
--
1.7.0.4

Greg Ungerer

2012-04-27 06:36:31 UTC

Permalink

Hi Finn,

On 27/04/12 12:49, Finn Thain wrote:
> On Thu, 26 Apr 2012, gerg at snapgear.com wrote:
>
>> + MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA),
>> + MCFGPS(QA, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB),
>
> I think the second label should be "QB".
>
> Also affected is "[PATCH 19/22] m68knommu: simplify the ColdFire 528x GPIO
> struct setup".

Good catch!
Thanks, I'll fix that up.

Regards
Greg

------------------------------------------------------------------------
Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
SnapGear Group, McAfee PHONE: +61 7 3435 2888
8 Gardner Close FAX: +61 7 3217 5323
Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com

Finn Thain

2012-04-27 02:49:09 UTC

Permalink

On Thu, 26 Apr 2012, gerg at snapgear.com wrote:

> + MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA),
> + MCFGPS(QA, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB),

I think the second label should be "QB".

Also affected is "[PATCH 19/22] m68knommu: simplify the ColdFire 528x GPIO
struct setup".

Finn

gerg

2012-04-26 00:25:49 UTC

Permalink

gerg

2012-04-26 00:25:51 UTC

Permalink

gerg

2012-04-26 00:25:52 UTC

Permalink

From: Greg Ungerer <gerg at uclinux.org>

The code that adds each ColdFire platforms GPIO signals is duplicated in
each platforms specific code. Remove it from each platforms code and put
a single version in the existing ColdFire gpio subsystem init code.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/include/asm/mcfgpio.h | 3 +++
arch/m68k/platform/5206/gpio.c | 12 ++----------
arch/m68k/platform/520x/gpio.c | 12 ++----------
arch/m68k/platform/523x/gpio.c | 12 ++----------
arch/m68k/platform/5249/gpio.c | 12 ++----------
arch/m68k/platform/5272/gpio.c | 12 ++----------
arch/m68k/platform/527x/gpio.c | 12 ++----------
arch/m68k/platform/528x/gpio.c | 12 ++----------
arch/m68k/platform/5307/gpio.c | 12 ++----------
arch/m68k/platform/532x/gpio.c | 12 ++----------
arch/m68k/platform/5407/gpio.c | 12 ++----------
arch/m68k/platform/coldfire/gpio.c | 4 ++++
12 files changed, 27 insertions(+), 100 deletions(-)

diff --git a/arch/m68k/include/asm/mcfgpio.h b/arch/m68k/include/asm/mcfgpio.h
index 148f56a..f0e3938 100644
--- a/arch/m68k/include/asm/mcfgpio.h
+++ b/arch/m68k/include/asm/mcfgpio.h
@@ -29,6 +29,9 @@ struct mcf_gpio_chip {
const u8 *gpio_to_pinmux;
};

+extern struct mcf_gpio_chip mcf_gpio_chips[];
+extern unsigned int mcf_gpio_chips_size;
+
int mcf_gpio_direction_input(struct gpio_chip *, unsigned);
int mcf_gpio_get_value(struct gpio_chip *, unsigned);
int mcf_gpio_direction_output(struct gpio_chip *, unsigned, int);
diff --git a/arch/m68k/platform/5206/gpio.c b/arch/m68k/platform/5206/gpio.c
index 200a7ac..a652f8e 100644
--- a/arch/m68k/platform/5206/gpio.c
+++ b/arch/m68k/platform/5206/gpio.c
@@ -20,16 +20,8 @@
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>

-static struct mcf_gpio_chip mcf_gpio_chips[] = {
+struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPS(PP, 0, 8, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
};

-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
diff --git a/arch/m68k/platform/520x/gpio.c b/arch/m68k/platform/520x/gpio.c
index 96b3685..49387c3 100644
--- a/arch/m68k/platform/520x/gpio.c
+++ b/arch/m68k/platform/520x/gpio.c
@@ -20,7 +20,7 @@
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>

-static struct mcf_gpio_chip mcf_gpio_chips[] = {
+struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
MCFGPF(CS, 9, 3),
MCFGPF(FECI2C, 16, 4),
@@ -31,12 +31,4 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPF(FECL, 56, 8),
};

-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
diff --git a/arch/m68k/platform/523x/gpio.c b/arch/m68k/platform/523x/gpio.c
index 8e6e30e..07806eb 100644
--- a/arch/m68k/platform/523x/gpio.c
+++ b/arch/m68k/platform/523x/gpio.c
@@ -20,7 +20,7 @@
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>

-static struct mcf_gpio_chip mcf_gpio_chips[] = {
+struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
MCFGPF(ADDR, 13, 3),
MCFGPF(DATAH, 16, 8),
@@ -37,12 +37,4 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPF(ETPU, 104, 3),
};

-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
diff --git a/arch/m68k/platform/5249/gpio.c b/arch/m68k/platform/5249/gpio.c
index 775d618..422e45f 100644
--- a/arch/m68k/platform/5249/gpio.c
+++ b/arch/m68k/platform/5249/gpio.c
@@ -20,17 +20,9 @@
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>

-static struct mcf_gpio_chip mcf_gpio_chips[] = {
+struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPS(GPIO0, 0, 32, MCFSIM2_GPIOENABLE, MCFSIM2_GPIOWRITE, MCFSIM2_GPIOREAD),
MCFGPS(GPIO1, 32, 32, MCFSIM2_GPIO1ENABLE, MCFSIM2_GPIO1WRITE, MCFSIM2_GPIO1READ),
};

-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
diff --git a/arch/m68k/platform/5272/gpio.c b/arch/m68k/platform/5272/gpio.c
index 91358b8..c029dab 100644
--- a/arch/m68k/platform/5272/gpio.c
+++ b/arch/m68k/platform/5272/gpio.c
@@ -20,18 +20,10 @@
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>

-static struct mcf_gpio_chip mcf_gpio_chips[] = {
+struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPS(PA, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
MCFGPS(PB, 16, 16, MCFSIM_PBDDR, MCFSIM_PBDAT, MCFSIM_PBDAT),
MCFGPS(Pc, 32, 16, MCFSIM_PCDDR, MCFSIM_PCDAT, MCFSIM_PCDAT),
};

-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
diff --git a/arch/m68k/platform/527x/gpio.c b/arch/m68k/platform/527x/gpio.c
index b612a63..1c8633b 100644
--- a/arch/m68k/platform/527x/gpio.c
+++ b/arch/m68k/platform/527x/gpio.c
@@ -20,7 +20,7 @@
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>

-static struct mcf_gpio_chip mcf_gpio_chips[] = {
+struct mcf_gpio_chip mcf_gpio_chips[] = {
#if defined(CONFIG_M5271)
MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
MCFGPF(ADDR, 13, 3),
@@ -58,12 +58,4 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
#endif
};

-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
diff --git a/arch/m68k/platform/528x/gpio.c b/arch/m68k/platform/528x/gpio.c
index f0e19d6..764c6c8 100644
--- a/arch/m68k/platform/528x/gpio.c
+++ b/arch/m68k/platform/528x/gpio.c
@@ -20,7 +20,7 @@
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>

-static struct mcf_gpio_chip mcf_gpio_chips[] = {
+struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPS(NQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
MCFGPS(TA, 8, 4, MCFGPTA_GPTDDR, MCFGPTA_GPTPORT, MCFGPTB_GPTPORT),
MCFGPS(TB, 16, 4, MCFGPTB_GPTDDR, MCFGPTB_GPTPORT, MCFGPTB_GPTPORT),
@@ -46,12 +46,4 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPF(UA, 176, 4),
};

-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
diff --git a/arch/m68k/platform/5307/gpio.c b/arch/m68k/platform/5307/gpio.c
index 91d0420..7bbbea7 100644
--- a/arch/m68k/platform/5307/gpio.c
+++ b/arch/m68k/platform/5307/gpio.c
@@ -20,16 +20,8 @@
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>

-static struct mcf_gpio_chip mcf_gpio_chips[] = {
+struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPS(PP, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
};

-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
diff --git a/arch/m68k/platform/532x/gpio.c b/arch/m68k/platform/532x/gpio.c
index 9454c65..3e1b71d 100644
--- a/arch/m68k/platform/532x/gpio.c
+++ b/arch/m68k/platform/532x/gpio.c
@@ -20,7 +20,7 @@
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>

-static struct mcf_gpio_chip mcf_gpio_chips[] = {
+struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
MCFGPF(FECH, 8, 8),
MCFGPF(FECL, 16, 8),
@@ -40,12 +40,4 @@ static struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPF(LCDCTLL, 128, 8),
};

-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
diff --git a/arch/m68k/platform/5407/gpio.c b/arch/m68k/platform/5407/gpio.c
index 91d0420..7bbbea7 100644
--- a/arch/m68k/platform/5407/gpio.c
+++ b/arch/m68k/platform/5407/gpio.c
@@ -20,16 +20,8 @@
#include <asm/mcfsim.h>
#include <asm/mcfgpio.h>

-static struct mcf_gpio_chip mcf_gpio_chips[] = {
+struct mcf_gpio_chip mcf_gpio_chips[] = {
MCFGPS(PP, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
};

-static int __init mcf_gpio_init(void)
-{
- unsigned i = 0;
- while (i < ARRAY_SIZE(mcf_gpio_chips))
- (void)gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
- return 0;
-}
-
-core_initcall(mcf_gpio_init);
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
diff --git a/arch/m68k/platform/coldfire/gpio.c b/arch/m68k/platform/coldfire/gpio.c
index 292a1a5..4c8c424 100644
--- a/arch/m68k/platform/coldfire/gpio.c
+++ b/arch/m68k/platform/coldfire/gpio.c
@@ -122,6 +122,10 @@ struct bus_type mcf_gpio_subsys = {

static int __init mcf_gpio_sysinit(void)
{
+ unsigned int i = 0;
+
+ while (i < mcf_gpio_chips_size)
+ gpiochip_add((struct gpio_chip *)&mcf_gpio_chips[i++]);
return subsys_system_register(&mcf_gpio_subsys, NULL);
}

--
1.7.0.4

gerg

2012-04-26 00:25:54 UTC

Permalink

gerg

2012-04-26 00:25:53 UTC

Permalink

gerg

2012-04-26 00:25:58 UTC

Permalink

From: Greg Ungerer <gerg at uclinux.org>

The GPIO data struct setup is now the only remaining code in the platform
gpio.c file. So move it to the platform config.c code and remove the gpio.c
file.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/platform/527x/Makefile | 2 +-
arch/m68k/platform/527x/config.c | 43 ++++++++++++++++++++++++++
arch/m68k/platform/527x/gpio.c | 61 --------------------------------------
3 files changed, 44 insertions(+), 62 deletions(-)
delete mode 100644 arch/m68k/platform/527x/gpio.c

diff --git a/arch/m68k/platform/527x/Makefile b/arch/m68k/platform/527x/Makefile
index 6ac4b57..8755c9e 100644
--- a/arch/m68k/platform/527x/Makefile
+++ b/arch/m68k/platform/527x/Makefile
@@ -14,5 +14,5 @@

asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1

-obj-y := config.o gpio.o
+obj-y := config.o

diff --git a/arch/m68k/platform/527x/config.c b/arch/m68k/platform/527x/config.c
index f91a532..d0502a8 100644
--- a/arch/m68k/platform/527x/config.c
+++ b/arch/m68k/platform/527x/config.c
@@ -20,6 +20,49 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfgpio.h>
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+#if defined(CONFIG_M5271)
+ MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(ADDR, 13, 3),
+ MCFGPF(DATAH, 16, 8),
+ MCFGPF(DATAL, 24, 8),
+ MCFGPF(BUSCTL, 32, 8),
+ MCFGPF(BS, 40, 4),
+ MCFGPF(CS, 49, 7),
+ MCFGPF(SDRAM, 56, 6),
+ MCFGPF(FECI2C, 64, 4),
+ MCFGPF(UARTH, 72, 2),
+ MCFGPF(UARTL, 80, 8),
+ MCFGPF(QSPI, 88, 5),
+ MCFGPF(TIMER, 96, 8),
+#elif defined(CONFIG_M5275)
+ MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(BUSCTL, 8, 8),
+ MCFGPF(ADDR, 21, 3),
+ MCFGPF(CS, 25, 7),
+ MCFGPF(FEC0H, 32, 8),
+ MCFGPF(FEC0L, 40, 8),
+ MCFGPF(FECI2C, 48, 6),
+ MCFGPF(QSPI, 56, 7),
+ MCFGPF(SDRAM, 64, 8),
+ MCFGPF(TIMERH, 72, 4),
+ MCFGPF(TIMERL, 80, 4),
+ MCFGPF(UARTL, 88, 8),
+ MCFGPF(FEC1H, 96, 8),
+ MCFGPF(FEC1L, 104, 8),
+ MCFGPF(BS, 114, 2),
+ MCFGPF(IRQ, 121, 7),
+ MCFGPF(USBH, 128, 1),
+ MCFGPF(USBL, 136, 8),
+ MCFGPF(UARTH, 144, 4),
+#endif
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);

/***************************************************************************/

diff --git a/arch/m68k/platform/527x/gpio.c b/arch/m68k/platform/527x/gpio.c
deleted file mode 100644
index 1c8633b..0000000
--- a/arch/m68k/platform/527x/gpio.c
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking at fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-struct mcf_gpio_chip mcf_gpio_chips[] = {
-#if defined(CONFIG_M5271)
- MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
- MCFGPF(ADDR, 13, 3),
- MCFGPF(DATAH, 16, 8),
- MCFGPF(DATAL, 24, 8),
- MCFGPF(BUSCTL, 32, 8),
- MCFGPF(BS, 40, 4),
- MCFGPF(CS, 49, 7),
- MCFGPF(SDRAM, 56, 6),
- MCFGPF(FECI2C, 64, 4),
- MCFGPF(UARTH, 72, 2),
- MCFGPF(UARTL, 80, 8),
- MCFGPF(QSPI, 88, 5),
- MCFGPF(TIMER, 96, 8),
-#elif defined(CONFIG_M5275)
- MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
- MCFGPF(BUSCTL, 8, 8),
- MCFGPF(ADDR, 21, 3),
- MCFGPF(CS, 25, 7),
- MCFGPF(FEC0H, 32, 8),
- MCFGPF(FEC0L, 40, 8),
- MCFGPF(FECI2C, 48, 6),
- MCFGPF(QSPI, 56, 7),
- MCFGPF(SDRAM, 64, 8),
- MCFGPF(TIMERH, 72, 4),
- MCFGPF(TIMERL, 80, 4),
- MCFGPF(UARTL, 88, 8),
- MCFGPF(FEC1H, 96, 8),
- MCFGPF(FEC1L, 104, 8),
- MCFGPF(BS, 114, 2),
- MCFGPF(IRQ, 121, 7),
- MCFGPF(USBH, 128, 1),
- MCFGPF(USBL, 136, 8),
- MCFGPF(UARTH, 144, 4),
-#endif
-};
-
-unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
--
1.7.0.4

gerg

2012-04-26 00:25:55 UTC

Permalink

From: Greg Ungerer <gerg at uclinux.org>

The GPIO data struct setup is now the only remaining code in the platform
gpio.c file. So move it to the platform config.c code and remove the gpio.c
file.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/platform/523x/Makefile | 2 +-
arch/m68k/platform/523x/config.c | 22 ++++++++++++++++++++
arch/m68k/platform/523x/gpio.c | 40 --------------------------------------
3 files changed, 23 insertions(+), 41 deletions(-)
delete mode 100644 arch/m68k/platform/523x/gpio.c

diff --git a/arch/m68k/platform/523x/Makefile b/arch/m68k/platform/523x/Makefile
index c04b8f7..e74be69 100644
--- a/arch/m68k/platform/523x/Makefile
+++ b/arch/m68k/platform/523x/Makefile
@@ -14,4 +14,4 @@

asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1

-obj-y := config.o gpio.o
+obj-y := config.o
diff --git a/arch/m68k/platform/523x/config.c b/arch/m68k/platform/523x/config.c
index c8b405d..d2b7a73 100644
--- a/arch/m68k/platform/523x/config.c
+++ b/arch/m68k/platform/523x/config.c
@@ -19,6 +19,28 @@
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
+#include <asm/mcfgpio.h>
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(ADDR, 13, 3),
+ MCFGPF(DATAH, 16, 8),
+ MCFGPF(DATAL, 24, 8),
+ MCFGPF(BUSCTL, 32, 8),
+ MCFGPF(BS, 40, 4),
+ MCFGPF(CS, 49, 7),
+ MCFGPF(SDRAM, 56, 6),
+ MCFGPF(FECI2C, 64, 4),
+ MCFGPF(UARTH, 72, 2),
+ MCFGPF(UARTL, 80, 8),
+ MCFGPF(QSPI, 88, 5),
+ MCFGPF(TIMER, 96, 8),
+ MCFGPF(ETPU, 104, 3),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);

/***************************************************************************/

diff --git a/arch/m68k/platform/523x/gpio.c b/arch/m68k/platform/523x/gpio.c
deleted file mode 100644
index 07806eb..0000000
--- a/arch/m68k/platform/523x/gpio.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking at fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-struct mcf_gpio_chip mcf_gpio_chips[] = {
- MCFGPS(PIRQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
- MCFGPF(ADDR, 13, 3),
- MCFGPF(DATAH, 16, 8),
- MCFGPF(DATAL, 24, 8),
- MCFGPF(BUSCTL, 32, 8),
- MCFGPF(BS, 40, 4),
- MCFGPF(CS, 49, 7),
- MCFGPF(SDRAM, 56, 6),
- MCFGPF(FECI2C, 64, 4),
- MCFGPF(UARTH, 72, 2),
- MCFGPF(UARTL, 80, 8),
- MCFGPF(QSPI, 88, 5),
- MCFGPF(TIMER, 96, 8),
- MCFGPF(ETPU, 104, 3),
-};
-
-unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
--
1.7.0.4

gerg

2012-04-26 00:25:56 UTC

Permalink

gerg

2012-04-26 00:25:57 UTC

Permalink

From: Greg Ungerer <gerg at uclinux.org>

The GPIO data struct setup is now the only remaining code in the platform
gpio.c file. So move it to the platform config.c code and remove the gpio.c
file.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/platform/5272/Makefile | 2 +-
arch/m68k/platform/5272/config.c | 11 +++++++++++
arch/m68k/platform/5272/gpio.c | 29 -----------------------------
3 files changed, 12 insertions(+), 30 deletions(-)
delete mode 100644 arch/m68k/platform/5272/gpio.c

diff --git a/arch/m68k/platform/5272/Makefile b/arch/m68k/platform/5272/Makefile
index 34110fc..932ddab 100644
--- a/arch/m68k/platform/5272/Makefile
+++ b/arch/m68k/platform/5272/Makefile
@@ -14,5 +14,5 @@

asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1

-obj-y := config.o gpio.o intc.o
+obj-y := config.o intc.o

diff --git a/arch/m68k/platform/5272/config.c b/arch/m68k/platform/5272/config.c
index e68bc7a..43e3606 100644
--- a/arch/m68k/platform/5272/config.c
+++ b/arch/m68k/platform/5272/config.c
@@ -19,6 +19,7 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfgpio.h>

/***************************************************************************/

@@ -30,6 +31,16 @@ unsigned char ledbank = 0xff;

/***************************************************************************/

+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(PA, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
+ MCFGPS(PB, 16, 16, MCFSIM_PBDDR, MCFSIM_PBDAT, MCFSIM_PBDAT),
+ MCFGPS(Pc, 32, 16, MCFSIM_PCDDR, MCFSIM_PCDAT, MCFSIM_PCDAT),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
+
+/***************************************************************************/
+
static void __init m5272_uarts_init(void)
{
u32 v;
diff --git a/arch/m68k/platform/5272/gpio.c b/arch/m68k/platform/5272/gpio.c
deleted file mode 100644
index c029dab..0000000
--- a/arch/m68k/platform/5272/gpio.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking at fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-struct mcf_gpio_chip mcf_gpio_chips[] = {
- MCFGPS(PA, 0, 16, MCFSIM_PADDR, MCFSIM_PADAT, MCFSIM_PADAT),
- MCFGPS(PB, 16, 16, MCFSIM_PBDDR, MCFSIM_PBDAT, MCFSIM_PBDAT),
- MCFGPS(Pc, 32, 16, MCFSIM_PCDDR, MCFSIM_PCDAT, MCFSIM_PCDAT),
-};
-
-unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
--
1.7.0.4

gerg

2012-04-26 00:26:00 UTC

Permalink

gerg

2012-04-26 00:26:01 UTC

Permalink

From: Greg Ungerer <gerg at uclinux.org>

The GPIO data struct setup is now the only remaining code in the platform
gpio.c file. So move it to the platform config.c code and remove the gpio.c
file.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/platform/532x/Makefile | 2 +-
arch/m68k/platform/532x/config.c | 25 ++++++++++++++++++++++
arch/m68k/platform/532x/gpio.c | 43 --------------------------------------
3 files changed, 26 insertions(+), 44 deletions(-)
delete mode 100644 arch/m68k/platform/532x/gpio.c

diff --git a/arch/m68k/platform/532x/Makefile b/arch/m68k/platform/532x/Makefile
index ce01669..c0d8cf8 100644
--- a/arch/m68k/platform/532x/Makefile
+++ b/arch/m68k/platform/532x/Makefile
@@ -15,4 +15,4 @@
asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1

#obj-y := config.o usb-mcf532x.o spi-mcf532x.o
-obj-y := config.o gpio.o
+obj-y := config.o
diff --git a/arch/m68k/platform/532x/config.c b/arch/m68k/platform/532x/config.c
index 2bec347..a4dd3d8 100644
--- a/arch/m68k/platform/532x/config.c
+++ b/arch/m68k/platform/532x/config.c
@@ -26,10 +26,35 @@
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
#include <asm/mcfdma.h>
+#include <asm/mcfgpio.h>
#include <asm/mcfwdebug.h>

/***************************************************************************/

+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPF(FECH, 8, 8),
+ MCFGPF(FECL, 16, 8),
+ MCFGPF(SSI, 24, 5),
+ MCFGPF(BUSCTL, 32, 4),
+ MCFGPF(BE, 40, 4),
+ MCFGPF(CS, 49, 5),
+ MCFGPF(PWM, 58, 4),
+ MCFGPF(FECI2C, 64, 4),
+ MCFGPF(UART, 72, 8),
+ MCFGPF(QSPI, 80, 6),
+ MCFGPF(TIMER, 88, 4),
+ MCFGPF(LCDDATAH, 96, 2),
+ MCFGPF(LCDDATAM, 104, 8),
+ MCFGPF(LCDDATAL, 112, 8),
+ MCFGPF(LCDCTLH, 120, 1),
+ MCFGPF(LCDCTLL, 128, 8),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
+
+/***************************************************************************/
+
#ifdef CONFIG_SPI_COLDFIRE_QSPI

static void __init m532x_qspi_init(void)
diff --git a/arch/m68k/platform/532x/gpio.c b/arch/m68k/platform/532x/gpio.c
deleted file mode 100644
index 3e1b71d..0000000
--- a/arch/m68k/platform/532x/gpio.c
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking at fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-struct mcf_gpio_chip mcf_gpio_chips[] = {
- MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
- MCFGPF(FECH, 8, 8),
- MCFGPF(FECL, 16, 8),
- MCFGPF(SSI, 24, 5),
- MCFGPF(BUSCTL, 32, 4),
- MCFGPF(BE, 40, 4),
- MCFGPF(CS, 49, 5),
- MCFGPF(PWM, 58, 4),
- MCFGPF(FECI2C, 64, 4),
- MCFGPF(UART, 72, 8),
- MCFGPF(QSPI, 80, 6),
- MCFGPF(TIMER, 88, 4),
- MCFGPF(LCDDATAH, 96, 2),
- MCFGPF(LCDDATAM, 104, 8),
- MCFGPF(LCDDATAL, 112, 8),
- MCFGPF(LCDCTLH, 120, 1),
- MCFGPF(LCDCTLL, 128, 8),
-};
-
-unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
--
1.7.0.4

mohamed nabil

2012-04-26 00:36:20 UTC

Permalink

that's a Fucking spam man !!

On Thu, Apr 26, 2012 at 2:26 AM, <gerg at snapgear.com> wrote:

> From: Greg Ungerer <gerg at uclinux.org>
>
> The GPIO data struct setup is now the only remaining code in the platform
> gpio.c file. So move it to the platform config.c code and remove the gpio.c
> file.
>
> Signed-off-by: Greg Ungerer <gerg at uclinux.org>
> ---
> arch/m68k/platform/532x/Makefile | 2 +-
> arch/m68k/platform/532x/config.c | 25 ++++++++++++++++++++++
> arch/m68k/platform/532x/gpio.c | 43
> --------------------------------------
> 3 files changed, 26 insertions(+), 44 deletions(-)
> delete mode 100644 arch/m68k/platform/532x/gpio.c
>
> diff --git a/arch/m68k/platform/532x/Makefile
> b/arch/m68k/platform/532x/Makefile
> index ce01669..c0d8cf8 100644
> --- a/arch/m68k/platform/532x/Makefile
> +++ b/arch/m68k/platform/532x/Makefile
> @@ -15,4 +15,4 @@
> asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
>
> #obj-y := config.o usb-mcf532x.o spi-mcf532x.o
> -obj-y := config.o gpio.o
> +obj-y := config.o
> diff --git a/arch/m68k/platform/532x/config.c
> b/arch/m68k/platform/532x/config.c
> index 2bec347..a4dd3d8 100644
> --- a/arch/m68k/platform/532x/config.c
> +++ b/arch/m68k/platform/532x/config.c
> @@ -26,10 +26,35 @@
> #include <asm/mcfsim.h>
> #include <asm/mcfuart.h>
> #include <asm/mcfdma.h>
> +#include <asm/mcfgpio.h>
> #include <asm/mcfwdebug.h>
>
>
> /***************************************************************************/
>
> +struct mcf_gpio_chip mcf_gpio_chips[] = {
> + MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
> + MCFGPF(FECH, 8, 8),
> + MCFGPF(FECL, 16, 8),
> + MCFGPF(SSI, 24, 5),
> + MCFGPF(BUSCTL, 32, 4),
> + MCFGPF(BE, 40, 4),
> + MCFGPF(CS, 49, 5),
> + MCFGPF(PWM, 58, 4),
> + MCFGPF(FECI2C, 64, 4),
> + MCFGPF(UART, 72, 8),
> + MCFGPF(QSPI, 80, 6),
> + MCFGPF(TIMER, 88, 4),
> + MCFGPF(LCDDATAH, 96, 2),
> + MCFGPF(LCDDATAM, 104, 8),
> + MCFGPF(LCDDATAL, 112, 8),
> + MCFGPF(LCDCTLH, 120, 1),
> + MCFGPF(LCDCTLL, 128, 8),
> +};
> +
> +unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
> +
>
> +/***************************************************************************/
> +
> #ifdef CONFIG_SPI_COLDFIRE_QSPI
>
> static void __init m532x_qspi_init(void)
> diff --git a/arch/m68k/platform/532x/gpio.c
> b/arch/m68k/platform/532x/gpio.c
> deleted file mode 100644
> index 3e1b71d..0000000
> --- a/arch/m68k/platform/532x/gpio.c
> +++ /dev/null
> @@ -1,43 +0,0 @@
> -/*
> - * Coldfire generic GPIO support
> - *
> - * (C) Copyright 2009, Steven King <sfking at fdwdc.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; version 2 of the License.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> -*/
> -
> -#include <linux/kernel.h>
> -#include <linux/init.h>
> -
> -#include <asm/coldfire.h>
> -#include <asm/mcfsim.h>
> -#include <asm/mcfgpio.h>
> -
> -struct mcf_gpio_chip mcf_gpio_chips[] = {
> - MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
> - MCFGPF(FECH, 8, 8),
> - MCFGPF(FECL, 16, 8),
> - MCFGPF(SSI, 24, 5),
> - MCFGPF(BUSCTL, 32, 4),
> - MCFGPF(BE, 40, 4),
> - MCFGPF(CS, 49, 5),
> - MCFGPF(PWM, 58, 4),
> - MCFGPF(FECI2C, 64, 4),
> - MCFGPF(UART, 72, 8),
> - MCFGPF(QSPI, 80, 6),
> - MCFGPF(TIMER, 88, 4),
> - MCFGPF(LCDDATAH, 96, 2),
> - MCFGPF(LCDDATAM, 104, 8),
> - MCFGPF(LCDDATAL, 112, 8),
> - MCFGPF(LCDCTLH, 120, 1),
> - MCFGPF(LCDCTLL, 128, 8),
> -};
> -
> -unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
> --
> 1.7.0.4
>
> _______________________________________________
> uClinux-dev mailing list
> uClinux-dev at uclinux.org
> http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
> This message was resent by uclinux-dev at uclinux.org
> To unsubscribe see:
> http://mailman.uclinux.org/mailman/options/uclinux-dev
>

--
______
Mohamed Nabil Hafez
Embedded Software Engineer
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Greg Ungerer

2012-04-26 00:45:51 UTC

Permalink

On 04/26/2012 10:36 AM, mohamed nabil wrote:
> that's a Fucking spam man !!

Huh?

Thats how open source development works. If you don't like it don't
subscribe to a developers list.

Regards
Greg

> On Thu, Apr 26, 2012 at 2:26 AM, <gerg at snapgear.com
> <mailto:gerg at snapgear.com>> wrote:
>
> From: Greg Ungerer <gerg at uclinux.org <mailto:gerg at uclinux.org>>
>
> The GPIO data struct setup is now the only remaining code in the
> platform
> gpio.c file. So move it to the platform config.c code and remove the
> gpio.c
> file.
>
> Signed-off-by: Greg Ungerer <gerg at uclinux.org <mailto:gerg at uclinux.org>>
> ---
> arch/m68k/platform/532x/Makefile | 2 +-
> arch/m68k/platform/532x/config.c | 25 ++++++++++++++++++++++
> arch/m68k/platform/532x/gpio.c | 43
> --------------------------------------
> 3 files changed, 26 insertions(+), 44 deletions(-)
> delete mode 100644 arch/m68k/platform/532x/gpio.c
>
> diff --git a/arch/m68k/platform/532x/Makefile
> b/arch/m68k/platform/532x/Makefile
> index ce01669..c0d8cf8 100644
> --- a/arch/m68k/platform/532x/Makefile
> +++ b/arch/m68k/platform/532x/Makefile
> @@ -15,4 +15,4 @@
> asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
>
> #obj-y := config.o usb-mcf532x.o spi-mcf532x.o
> -obj-y := config.o gpio.o
> +obj-y := config.o
> diff --git a/arch/m68k/platform/532x/config.c
> b/arch/m68k/platform/532x/config.c
> index 2bec347..a4dd3d8 100644
> --- a/arch/m68k/platform/532x/config.c
> +++ b/arch/m68k/platform/532x/config.c
> @@ -26,10 +26,35 @@
> #include <asm/mcfsim.h>
> #include <asm/mcfuart.h>
> #include <asm/mcfdma.h>
> +#include <asm/mcfgpio.h>
> #include <asm/mcfwdebug.h>
>
> /***************************************************************************/
>
> +struct mcf_gpio_chip mcf_gpio_chips[] = {
> + MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR,
> MCFEPORT_EPPDR),
> + MCFGPF(FECH, 8, 8),
> + MCFGPF(FECL, 16, 8),
> + MCFGPF(SSI, 24, 5),
> + MCFGPF(BUSCTL, 32, 4),
> + MCFGPF(BE, 40, 4),
> + MCFGPF(CS, 49, 5),
> + MCFGPF(PWM, 58, 4),
> + MCFGPF(FECI2C, 64, 4),
> + MCFGPF(UART, 72, 8),
> + MCFGPF(QSPI, 80, 6),
> + MCFGPF(TIMER, 88, 4),
> + MCFGPF(LCDDATAH, 96, 2),
> + MCFGPF(LCDDATAM, 104, 8),
> + MCFGPF(LCDDATAL, 112, 8),
> + MCFGPF(LCDCTLH, 120, 1),
> + MCFGPF(LCDCTLL, 128, 8),
> +};
> +
> +unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
> +
> +/***************************************************************************/
> +
> #ifdef CONFIG_SPI_COLDFIRE_QSPI
>
> static void __init m532x_qspi_init(void)
> diff --git a/arch/m68k/platform/532x/gpio.c
> b/arch/m68k/platform/532x/gpio.c
> deleted file mode 100644
> index 3e1b71d..0000000
> --- a/arch/m68k/platform/532x/gpio.c
> +++ /dev/null
> @@ -1,43 +0,0 @@
> -/*
> - * Coldfire generic GPIO support
> - *
> - * (C) Copyright 2009, Steven King <sfking at fdwdc.com
> <mailto:sfking at fdwdc.com>>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License as published by
> - * the Free Software Foundation; version 2 of the License.
> - *
> - * This program is distributed in the hope that it will be useful,
> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> -*/
> -
> -#include <linux/kernel.h>
> -#include <linux/init.h>
> -
> -#include <asm/coldfire.h>
> -#include <asm/mcfsim.h>
> -#include <asm/mcfgpio.h>
> -
> -struct mcf_gpio_chip mcf_gpio_chips[] = {
> - MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR,
> MCFEPORT_EPPDR),
> - MCFGPF(FECH, 8, 8),
> - MCFGPF(FECL, 16, 8),
> - MCFGPF(SSI, 24, 5),
> - MCFGPF(BUSCTL, 32, 4),
> - MCFGPF(BE, 40, 4),
> - MCFGPF(CS, 49, 5),
> - MCFGPF(PWM, 58, 4),
> - MCFGPF(FECI2C, 64, 4),
> - MCFGPF(UART, 72, 8),
> - MCFGPF(QSPI, 80, 6),
> - MCFGPF(TIMER, 88, 4),
> - MCFGPF(LCDDATAH, 96, 2),
> - MCFGPF(LCDDATAM, 104, 8),
> - MCFGPF(LCDDATAL, 112, 8),
> - MCFGPF(LCDCTLH, 120, 1),
> - MCFGPF(LCDCTLL, 128, 8),
> -};
> -
> -unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
> --
> 1.7.0.4
>
> _______________________________________________
> uClinux-dev mailing list
> uClinux-dev at uclinux.org <mailto:uClinux-dev at uclinux.org>
> http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
> This message was resent by uclinux-dev at uclinux.org
> <mailto:uclinux-dev at uclinux.org>
> To unsubscribe see:
> http://mailman.uclinux.org/mailman/options/uclinux-dev
>
>
>
>
> --
> ______
> Mohamed Nabil Hafez
> Embedded Software Engineer
>

--
------------------------------------------------------------------------
Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
SnapGear Group, McAfee PHONE: +61 7 3435 2888
8 Gardner Close, FAX: +61 7 3891 3630
Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com

Lennart Sorensen

2012-04-26 16:14:17 UTC

Permalink

On Thu, Apr 26, 2012 at 02:36:20AM +0200, mohamed nabil wrote:
> that's a Fucking spam man !!

It was an overview and 22 patch files, sent in standard git email style.
Very organized, all in one thread, easy to read. Nothing wrong with it.

--
Len Sorensen

burcu sariozlu

2012-04-26 20:45:39 UTC

Permalink

can somebody stop this please?

> Date: Thu, 26 Apr 2012 12:14:17 -0400
> To: uclinux-dev at uclinux.org
> From: lsorense at csclub.uwaterloo.ca
> CC: linux-m68k at vger.kernel.org; gerg at uclinux.org
> Subject: Re: [uClinux-dev] [PATCH 21/22] m68knommu: simplify the ColdFire 532x GPIO struct setup
>
> On Thu, Apr 26, 2012 at 02:36:20AM +0200, mohamed nabil wrote:
> > that's a Fucking spam man !!
>
> It was an overview and 22 patch files, sent in standard git email style.
> Very organized, all in one thread, easy to read. Nothing wrong with it.
>
> --
> Len Sorensen
> _______________________________________________
> uClinux-dev mailing list
> uClinux-dev at uclinux.org
> http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
> This message was resent by uclinux-dev at uclinux.org
> To unsubscribe see:
> http://mailman.uclinux.org/mailman/options/uclinux-dev

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gerg

2012-04-26 00:26:02 UTC

Permalink

gerg

2012-04-26 00:25:59 UTC

Permalink

From: Greg Ungerer <gerg at uclinux.org>

The GPIO data struct setup is now the only remaining code in the platform
gpio.c file. So move it to the platform config.c code and remove the gpio.c
file.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/platform/528x/Makefile | 2 +-
arch/m68k/platform/528x/config.c | 31 ++++++++++++++++++++++++
arch/m68k/platform/528x/gpio.c | 49 --------------------------------------
3 files changed, 32 insertions(+), 50 deletions(-)
delete mode 100644 arch/m68k/platform/528x/gpio.c

diff --git a/arch/m68k/platform/528x/Makefile b/arch/m68k/platform/528x/Makefile
index 6ac4b57..8755c9e 100644
--- a/arch/m68k/platform/528x/Makefile
+++ b/arch/m68k/platform/528x/Makefile
@@ -14,5 +14,5 @@

asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1

-obj-y := config.o gpio.o
+obj-y := config.o

diff --git a/arch/m68k/platform/528x/config.c b/arch/m68k/platform/528x/config.c
index d449292..3ea9545 100644
--- a/arch/m68k/platform/528x/config.c
+++ b/arch/m68k/platform/528x/config.c
@@ -21,6 +21,37 @@
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
#include <asm/mcfuart.h>
+#include <asm/mcfgpio.h>
+
+/***************************************************************************/
+
+struct mcf_gpio_chip mcf_gpio_chips[] = {
+ MCFGPS(NQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
+ MCFGPS(TA, 8, 4, MCFGPTA_GPTDDR, MCFGPTA_GPTPORT, MCFGPTB_GPTPORT),
+ MCFGPS(TB, 16, 4, MCFGPTB_GPTDDR, MCFGPTB_GPTPORT, MCFGPTB_GPTPORT),
+ MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA),
+ MCFGPS(QA, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB),
+ MCFGPF(A, 40, 8),
+ MCFGPF(B, 48, 8),
+ MCFGPF(C, 56, 8),
+ MCFGPF(D, 64, 8),
+ MCFGPF(E, 72, 8),
+ MCFGPF(F, 80, 8),
+ MCFGPF(G, 88, 8),
+ MCFGPF(H, 96, 8),
+ MCFGPF(J, 104, 8),
+ MCFGPF(DD, 112, 8),
+ MCFGPF(EH, 120, 8),
+ MCFGPF(EL, 128, 8),
+ MCFGPF(AS, 136, 6),
+ MCFGPF(QS, 144, 7),
+ MCFGPF(SD, 152, 6),
+ MCFGPF(TC, 160, 4),
+ MCFGPF(TD, 168, 4),
+ MCFGPF(UA, 176, 4),
+};
+
+unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);

/***************************************************************************/

diff --git a/arch/m68k/platform/528x/gpio.c b/arch/m68k/platform/528x/gpio.c
deleted file mode 100644
index 764c6c8..0000000
--- a/arch/m68k/platform/528x/gpio.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * Coldfire generic GPIO support
- *
- * (C) Copyright 2009, Steven King <sfking at fdwdc.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
-*/
-
-#include <linux/kernel.h>
-#include <linux/init.h>
-
-#include <asm/coldfire.h>
-#include <asm/mcfsim.h>
-#include <asm/mcfgpio.h>
-
-struct mcf_gpio_chip mcf_gpio_chips[] = {
- MCFGPS(NQ, 1, 7, MCFEPORT_EPDDR, MCFEPORT_EPDR, MCFEPORT_EPPDR),
- MCFGPS(TA, 8, 4, MCFGPTA_GPTDDR, MCFGPTA_GPTPORT, MCFGPTB_GPTPORT),
- MCFGPS(TB, 16, 4, MCFGPTB_GPTDDR, MCFGPTB_GPTPORT, MCFGPTB_GPTPORT),
- MCFGPS(QA, 24, 4, MCFQADC_DDRQA, MCFQADC_PORTQA, MCFQADC_PORTQA),
- MCFGPS(QA, 32, 4, MCFQADC_DDRQB, MCFQADC_PORTQB, MCFQADC_PORTQB),
- MCFGPF(A, 40, 8),
- MCFGPF(B, 48, 8),
- MCFGPF(C, 56, 8),
- MCFGPF(D, 64, 8),
- MCFGPF(E, 72, 8),
- MCFGPF(F, 80, 8),
- MCFGPF(G, 88, 8),
- MCFGPF(H, 96, 8),
- MCFGPF(J, 104, 8),
- MCFGPF(DD, 112, 8),
- MCFGPF(EH, 120, 8),
- MCFGPF(EL, 128, 8),
- MCFGPF(AS, 136, 6),
- MCFGPF(QS, 144, 7),
- MCFGPF(SD, 152, 6),
- MCFGPF(TC, 160, 4),
- MCFGPF(TD, 168, 4),
- MCFGPF(UA, 176, 4),
-};
-
-unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
--
1.7.0.4

Alex LI

2012-04-26 00:53:24 UTC

Permalink

Greg,

You sent 50 mails in 1 min.

Sent from my Sony Ericsson Xperia arc S

Greg Ungerer <gerg at snapgear.com> ?:

>On 04/26/2012 10:36 AM, mohamed nabil wrote:
>> that's a Fucking spam man !!
>
>Huh?
>
>Thats how open source development works. If you don't like it don't
>subscribe to a developers list.
>
>Regards
>Greg
>
>
>
>> On Thu, Apr 26, 2012 at 2:26 AM, <gerg at snapgear.com
>> <mailto:gerg at snapgear.com>> wrote:
>>
>> From: Greg Ungerer <gerg at uclinux.org <mailto:gerg at uclinux.org>>
>>
>> The GPIO data struct setup is now the only remaining code in the
>> platform
>> gpio.c file. So move it to the platform config.c code and remove the
>> gpio.c
>> file.
>>
>> Signed-off-by: Greg Ungerer <gerg at uclinux.org <mailto:gerg at uclinux.org>>
>> ---
>> arch/m68k/platform/532x/Makefile | 2 +-
>> arch/m68k/platform/532x/config.c | 25 ++++++++++++++++++++++
>> arch/m68k/platform/532x/gpio.c | 43
>> --------------------------------------
>> 3 files changed, 26 insertions(+), 44 deletions(-)
>> delete mode 100644 arch/m68k/platform/532x/gpio.c
>>
>> diff --git a/arch/m68k/platform/532x/Makefile
>> b/arch/m68k/platform/532x/Makefile
>> index ce01669..c0d8cf8 100644
>> --- a/arch/m68k/platform/532x/Makefile
>> +++ b/arch/m68k/platform/532x/Makefile
>> @@ -15,4 +15,4 @@
>> asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
>>
>> #obj-y := config.o usb-mcf532x.o spi-mcf532x.o
>> -obj-y := config.o gpio.o
>> +obj-y := config.o
>> diff --git a/arch/m68k/platform/532x/config.c
>> b/arch/m68k/platform/532x/config.c
>> index 2bec347..a4dd3d8 100644
>> --- a/arch/m68k/platform/532x/config.c
>> +++ b/arch/m68k/platform/532x/config.c
>> @@ -26,10 +26,35 @@
>> #include <asm/mcfsim.h>
>> #include <asm/mcfuart.h>
>> #include <asm/mcfdma.h>
>> +#include <asm/mcfgpio.h>
>> #include <asm/mcfwdebug.h>
>>
>> /***************************************************************************/
>>
>> +struct mcf_gpio_chip mcf_gpio_chips[] = {
>> + MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR,
>> MCFEPORT_EPPDR),
>> + MCFGPF(FECH, 8, 8),
>> + MCFGPF(FECL, 16, 8),
>> + MCFGPF(SSI, 24, 5),
>> + MCFGPF(BUSCTL, 32, 4),
>> + MCFGPF(BE, 40, 4),
>> + MCFGPF(CS, 49, 5),
>> + MCFGPF(PWM, 58, 4),
>> + MCFGPF(FECI2C, 64, 4),
>> + MCFGPF(UART, 72, 8),
>> + MCFGPF(QSPI, 80, 6),
>> + MCFGPF(TIMER, 88, 4),
>> + MCFGPF(LCDDATAH, 96, 2),
>> + MCFGPF(LCDDATAM, 104, 8),
>> + MCFGPF(LCDDATAL, 112, 8),
>> + MCFGPF(LCDCTLH, 120, 1),
>> + MCFGPF(LCDCTLL, 128, 8),
>> +};
>> +
>> +unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
>> +
>> +/***************************************************************************/
>> +
>> #ifdef CONFIG_SPI_COLDFIRE_QSPI
>>
>> static void __init m532x_qspi_init(void)
>> diff --git a/arch/m68k/platform/532x/gpio.c
>> b/arch/m68k/platform/532x/gpio.c
>> deleted file mode 100644
>> index 3e1b71d..0000000
>> --- a/arch/m68k/platform/532x/gpio.c
>> +++ /dev/null
>> @@ -1,43 +0,0 @@
>> -/*
>> - * Coldfire generic GPIO support
>> - *
>> - * (C) Copyright 2009, Steven King <sfking at fdwdc.com
>> <mailto:sfking at fdwdc.com>>
>> - *
>> - * This program is free software; you can redistribute it and/or modify
>> - * it under the terms of the GNU General Public License as published by
>> - * the Free Software Foundation; version 2 of the License.
>> - *
>> - * This program is distributed in the hope that it will be useful,
>> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> - * GNU General Public License for more details.
>> -*/
>> -
>> -#include <linux/kernel.h>
>> -#include <linux/init.h>
>> -
>> -#include <asm/coldfire.h>
>> -#include <asm/mcfsim.h>
>> -#include <asm/mcfgpio.h>
>> -
>> -struct mcf_gpio_chip mcf_gpio_chips[] = {
>> - MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR,
>> MCFEPORT_EPPDR),
>> - MCFGPF(FECH, 8, 8),
>> - MCFGPF(FECL, 16, 8),
>> - MCFGPF(SSI, 24, 5),
>> - MCFGPF(BUSCTL, 32, 4),
>> - MCFGPF(BE, 40, 4),
>> - MCFGPF(CS, 49, 5),
>> - MCFGPF(PWM, 58, 4),
>> - MCFGPF(FECI2C, 64, 4),
>> - MCFGPF(UART, 72, 8),
>> - MCFGPF(QSPI, 80, 6),
>> - MCFGPF(TIMER, 88, 4),
>> - MCFGPF(LCDDATAH, 96, 2),
>> - MCFGPF(LCDDATAM, 104, 8),
>> - MCFGPF(LCDDATAL, 112, 8),
>> - MCFGPF(LCDCTLH, 120, 1),
>> - MCFGPF(LCDCTLL, 128, 8),
>> -};
>> -
>> -unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
>> --
>> 1.7.0.4
>>
>> _______________________________________________
>> uClinux-dev mailing list
>> uClinux-dev at uclinux.org <mailto:uClinux-dev at uclinux.org>
>> http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
>> This message was resent by uclinux-dev at uclinux.org
>> <mailto:uclinux-dev at uclinux.org>
>> To unsubscribe see:
>> http://mailman.uclinux.org/mailman/options/uclinux-dev
>>
>>
>>
>>
>> --
>> ______
>> Mohamed Nabil Hafez
>> Embedded Software Engineer
>>
>
>
>--
>------------------------------------------------------------------------
>Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
>SnapGear Group, McAfee PHONE: +61 7 3435 2888
>8 Gardner Close, FAX: +61 7 3891 3630
>Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com
>_______________________________________________
>uClinux-dev mailing list
>uClinux-dev at uclinux.org
>http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
>This message was resent by uclinux-dev at uclinux.org
>To unsubscribe see:
>http://mailman.uclinux.org/mailman/options/uclinux-dev
>

Greg Ungerer

2012-04-26 01:07:45 UTC

Permalink

Hi Alex,

On 04/26/2012 10:53 AM, Alex LI wrote:
> You sent 50 mails in 1 min.

I sent 23. And both list archives (linux-m68k and uclinux-dev) only
show the 23 emails.

Maybe the uclinux-dev reflecter is sending dupes to list recpients?

Regards
Greg

> Sent from my Sony Ericsson Xperia arc S
>
> Greg Ungerer<gerg at snapgear.com> ?:
>
>> On 04/26/2012 10:36 AM, mohamed nabil wrote:
>>> that's a Fucking spam man !!
>>
>> Huh?
>>
>> Thats how open source development works. If you don't like it don't
>> subscribe to a developers list.
>>
>> Regards
>> Greg
>>
>>
>>
>>> On Thu, Apr 26, 2012 at 2:26 AM,<gerg at snapgear.com
>>> <mailto:gerg at snapgear.com>> wrote:
>>>
>>> From: Greg Ungerer<gerg at uclinux.org<mailto:gerg at uclinux.org>>
>>>
>>> The GPIO data struct setup is now the only remaining code in the
>>> platform
>>> gpio.c file. So move it to the platform config.c code and remove the
>>> gpio.c
>>> file.
>>>
>>> Signed-off-by: Greg Ungerer<gerg at uclinux.org<mailto:gerg at uclinux.org>>
>>> ---
>>> arch/m68k/platform/532x/Makefile | 2 +-
>>> arch/m68k/platform/532x/config.c | 25 ++++++++++++++++++++++
>>> arch/m68k/platform/532x/gpio.c | 43
>>> --------------------------------------
>>> 3 files changed, 26 insertions(+), 44 deletions(-)
>>> delete mode 100644 arch/m68k/platform/532x/gpio.c
>>>
>>> diff --git a/arch/m68k/platform/532x/Makefile
>>> b/arch/m68k/platform/532x/Makefile
>>> index ce01669..c0d8cf8 100644
>>> --- a/arch/m68k/platform/532x/Makefile
>>> +++ b/arch/m68k/platform/532x/Makefile
>>> @@ -15,4 +15,4 @@
>>> asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
>>>
>>> #obj-y := config.o usb-mcf532x.o spi-mcf532x.o
>>> -obj-y := config.o gpio.o
>>> +obj-y := config.o
>>> diff --git a/arch/m68k/platform/532x/config.c
>>> b/arch/m68k/platform/532x/config.c
>>> index 2bec347..a4dd3d8 100644
>>> --- a/arch/m68k/platform/532x/config.c
>>> +++ b/arch/m68k/platform/532x/config.c
>>> @@ -26,10 +26,35 @@
>>> #include<asm/mcfsim.h>
>>> #include<asm/mcfuart.h>
>>> #include<asm/mcfdma.h>
>>> +#include<asm/mcfgpio.h>
>>> #include<asm/mcfwdebug.h>
>>>
>>> /***************************************************************************/
>>>
>>> +struct mcf_gpio_chip mcf_gpio_chips[] = {
>>> + MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR,
>>> MCFEPORT_EPPDR),
>>> + MCFGPF(FECH, 8, 8),
>>> + MCFGPF(FECL, 16, 8),
>>> + MCFGPF(SSI, 24, 5),
>>> + MCFGPF(BUSCTL, 32, 4),
>>> + MCFGPF(BE, 40, 4),
>>> + MCFGPF(CS, 49, 5),
>>> + MCFGPF(PWM, 58, 4),
>>> + MCFGPF(FECI2C, 64, 4),
>>> + MCFGPF(UART, 72, 8),
>>> + MCFGPF(QSPI, 80, 6),
>>> + MCFGPF(TIMER, 88, 4),
>>> + MCFGPF(LCDDATAH, 96, 2),
>>> + MCFGPF(LCDDATAM, 104, 8),
>>> + MCFGPF(LCDDATAL, 112, 8),
>>> + MCFGPF(LCDCTLH, 120, 1),
>>> + MCFGPF(LCDCTLL, 128, 8),
>>> +};
>>> +
>>> +unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
>>> +
>>> +/***************************************************************************/
>>> +
>>> #ifdef CONFIG_SPI_COLDFIRE_QSPI
>>>
>>> static void __init m532x_qspi_init(void)
>>> diff --git a/arch/m68k/platform/532x/gpio.c
>>> b/arch/m68k/platform/532x/gpio.c
>>> deleted file mode 100644
>>> index 3e1b71d..0000000
>>> --- a/arch/m68k/platform/532x/gpio.c
>>> +++ /dev/null
>>> @@ -1,43 +0,0 @@
>>> -/*
>>> - * Coldfire generic GPIO support
>>> - *
>>> - * (C) Copyright 2009, Steven King<sfking at fdwdc.com
>>> <mailto:sfking at fdwdc.com>>
>>> - *
>>> - * This program is free software; you can redistribute it and/or modify
>>> - * it under the terms of the GNU General Public License as published by
>>> - * the Free Software Foundation; version 2 of the License.
>>> - *
>>> - * This program is distributed in the hope that it will be useful,
>>> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>> - * GNU General Public License for more details.
>>> -*/
>>> -
>>> -#include<linux/kernel.h>
>>> -#include<linux/init.h>
>>> -
>>> -#include<asm/coldfire.h>
>>> -#include<asm/mcfsim.h>
>>> -#include<asm/mcfgpio.h>
>>> -
>>> -struct mcf_gpio_chip mcf_gpio_chips[] = {
>>> - MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR,
>>> MCFEPORT_EPPDR),
>>> - MCFGPF(FECH, 8, 8),
>>> - MCFGPF(FECL, 16, 8),
>>> - MCFGPF(SSI, 24, 5),
>>> - MCFGPF(BUSCTL, 32, 4),
>>> - MCFGPF(BE, 40, 4),
>>> - MCFGPF(CS, 49, 5),
>>> - MCFGPF(PWM, 58, 4),
>>> - MCFGPF(FECI2C, 64, 4),
>>> - MCFGPF(UART, 72, 8),
>>> - MCFGPF(QSPI, 80, 6),
>>> - MCFGPF(TIMER, 88, 4),
>>> - MCFGPF(LCDDATAH, 96, 2),
>>> - MCFGPF(LCDDATAM, 104, 8),
>>> - MCFGPF(LCDDATAL, 112, 8),
>>> - MCFGPF(LCDCTLH, 120, 1),
>>> - MCFGPF(LCDCTLL, 128, 8),
>>> -};
>>> -
>>> -unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
>>> --
>>> 1.7.0.4
>>>
>>> _______________________________________________
>>> uClinux-dev mailing list
>>> uClinux-dev at uclinux.org<mailto:uClinux-dev at uclinux.org>
>>> http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
>>> This message was resent by uclinux-dev at uclinux.org
>>> <mailto:uclinux-dev at uclinux.org>
>>> To unsubscribe see:
>>> http://mailman.uclinux.org/mailman/options/uclinux-dev
>>>
>>>
>>>
>>>
>>> --
>>> ______
>>> Mohamed Nabil Hafez
>>> Embedded Software Engineer
>>>
>>
>>
>> --
>> ------------------------------------------------------------------------
>> Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
>> SnapGear Group, McAfee PHONE: +61 7 3435 2888
>> 8 Gardner Close, FAX: +61 7 3891 3630
>> Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com
>> _______________________________________________
>> uClinux-dev mailing list
>> uClinux-dev at uclinux.org
>> http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
>> This message was resent by uclinux-dev at uclinux.org
>> To unsubscribe see:
>> http://mailman.uclinux.org/mailman/options/uclinux-dev
>>
> ???
?&?~?&???+-?????w??????m?b??f??"??^n?r???z???h????&??
?G???h?(????j"???m?????z?????f???h???~?m?
>
>

--
------------------------------------------------------------------------
Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
SnapGear Group, McAfee PHONE: +61 7 3435 2888
8 Gardner Close, FAX: +61 7 3891 3630
Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com

Johan Transez

2012-04-26 06:54:55 UTC

Permalink

Maybe Alex is registered twice. I received only the 23 mails that Greg mentions.
It's good to see that uCLinux is still alive and kicking :)

Johan.

-----Original Message-----
From: uclinux-dev-bounces at uclinux.org [mailto:uclinux-dev-bounces at uclinux.org] On Behalf Of Greg Ungerer
Sent: donderdag 26 april 2012 3:08
To: Alex LI
Cc: mohamed nabil; linux-m68k at vger.kernel.org; uClinux development list; Greg Ungerer
Subject: Re: [uClinux-dev] [PATCH 21/22] m68knommu: simplify the ColdFire 532x GPIO struct setup

Hi Alex,

On 04/26/2012 10:53 AM, Alex LI wrote:
> You sent 50 mails in 1 min.

I sent 23. And both list archives (linux-m68k and uclinux-dev) only show the 23 emails.

Maybe the uclinux-dev reflecter is sending dupes to list recpients?

Regards
Greg

> Sent from my Sony Ericsson Xperia arc S
>
> Greg Ungerer<gerg at snapgear.com> ?:
>
>> On 04/26/2012 10:36 AM, mohamed nabil wrote:
>>> that's a Fucking spam man !!
>>
>> Huh?
>>
>> Thats how open source development works. If you don't like it don't
>> subscribe to a developers list.
>>
>> Regards
>> Greg
>>
>>
>>
>>> On Thu, Apr 26, 2012 at 2:26 AM,<gerg at snapgear.com
>>> <mailto:gerg at snapgear.com>> wrote:
>>>
>>> From: Greg Ungerer<gerg at uclinux.org<mailto:gerg at uclinux.org>>
>>>
>>> The GPIO data struct setup is now the only remaining code in the
>>> platform
>>> gpio.c file. So move it to the platform config.c code and remove the
>>> gpio.c
>>> file.
>>>
>>> Signed-off-by: Greg Ungerer<gerg at uclinux.org<mailto:gerg at uclinux.org>>
>>> ---
>>> arch/m68k/platform/532x/Makefile | 2 +-
>>> arch/m68k/platform/532x/config.c | 25 ++++++++++++++++++++++
>>> arch/m68k/platform/532x/gpio.c | 43
>>> --------------------------------------
>>> 3 files changed, 26 insertions(+), 44 deletions(-)
>>> delete mode 100644 arch/m68k/platform/532x/gpio.c
>>>
>>> diff --git a/arch/m68k/platform/532x/Makefile
>>> b/arch/m68k/platform/532x/Makefile
>>> index ce01669..c0d8cf8 100644
>>> --- a/arch/m68k/platform/532x/Makefile
>>> +++ b/arch/m68k/platform/532x/Makefile
>>> @@ -15,4 +15,4 @@
>>> asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
>>>
>>> #obj-y := config.o usb-mcf532x.o spi-mcf532x.o
>>> -obj-y := config.o gpio.o
>>> +obj-y := config.o
>>> diff --git a/arch/m68k/platform/532x/config.c
>>> b/arch/m68k/platform/532x/config.c
>>> index 2bec347..a4dd3d8 100644
>>> --- a/arch/m68k/platform/532x/config.c
>>> +++ b/arch/m68k/platform/532x/config.c
>>> @@ -26,10 +26,35 @@
>>> #include<asm/mcfsim.h>
>>> #include<asm/mcfuart.h>
>>> #include<asm/mcfdma.h>
>>> +#include<asm/mcfgpio.h>
>>> #include<asm/mcfwdebug.h>
>>>
>>>
>>> /*******************************************************************
>>> ********/
>>>
>>> +struct mcf_gpio_chip mcf_gpio_chips[] = {
>>> + MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR,
>>> MCFEPORT_EPPDR),
>>> + MCFGPF(FECH, 8, 8),
>>> + MCFGPF(FECL, 16, 8),
>>> + MCFGPF(SSI, 24, 5),
>>> + MCFGPF(BUSCTL, 32, 4),
>>> + MCFGPF(BE, 40, 4),
>>> + MCFGPF(CS, 49, 5),
>>> + MCFGPF(PWM, 58, 4),
>>> + MCFGPF(FECI2C, 64, 4),
>>> + MCFGPF(UART, 72, 8),
>>> + MCFGPF(QSPI, 80, 6),
>>> + MCFGPF(TIMER, 88, 4),
>>> + MCFGPF(LCDDATAH, 96, 2),
>>> + MCFGPF(LCDDATAM, 104, 8),
>>> + MCFGPF(LCDDATAL, 112, 8),
>>> + MCFGPF(LCDCTLH, 120, 1),
>>> + MCFGPF(LCDCTLL, 128, 8),
>>> +};
>>> +
>>> +unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
>>> +
>>> +/***************************************************************************/
>>> +
>>> #ifdef CONFIG_SPI_COLDFIRE_QSPI
>>>
>>> static void __init m532x_qspi_init(void)
>>> diff --git a/arch/m68k/platform/532x/gpio.c
>>> b/arch/m68k/platform/532x/gpio.c
>>> deleted file mode 100644
>>> index 3e1b71d..0000000
>>> --- a/arch/m68k/platform/532x/gpio.c
>>> +++ /dev/null
>>> @@ -1,43 +0,0 @@
>>> -/*
>>> - * Coldfire generic GPIO support
>>> - *
>>> - * (C) Copyright 2009, Steven King<sfking at fdwdc.com
>>> <mailto:sfking at fdwdc.com>>
>>> - *
>>> - * This program is free software; you can redistribute it and/or modify
>>> - * it under the terms of the GNU General Public License as published by
>>> - * the Free Software Foundation; version 2 of the License.
>>> - *
>>> - * This program is distributed in the hope that it will be useful,
>>> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>> - * GNU General Public License for more details.
>>> -*/
>>> -
>>> -#include<linux/kernel.h>
>>> -#include<linux/init.h>
>>> -
>>> -#include<asm/coldfire.h>
>>> -#include<asm/mcfsim.h>
>>> -#include<asm/mcfgpio.h>
>>> -
>>> -struct mcf_gpio_chip mcf_gpio_chips[] = {
>>> - MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR,
>>> MCFEPORT_EPPDR),
>>> - MCFGPF(FECH, 8, 8),
>>> - MCFGPF(FECL, 16, 8),
>>> - MCFGPF(SSI, 24, 5),
>>> - MCFGPF(BUSCTL, 32, 4),
>>> - MCFGPF(BE, 40, 4),
>>> - MCFGPF(CS, 49, 5),
>>> - MCFGPF(PWM, 58, 4),
>>> - MCFGPF(FECI2C, 64, 4),
>>> - MCFGPF(UART, 72, 8),
>>> - MCFGPF(QSPI, 80, 6),
>>> - MCFGPF(TIMER, 88, 4),
>>> - MCFGPF(LCDDATAH, 96, 2),
>>> - MCFGPF(LCDDATAM, 104, 8),
>>> - MCFGPF(LCDDATAL, 112, 8),
>>> - MCFGPF(LCDCTLH, 120, 1),
>>> - MCFGPF(LCDCTLL, 128, 8),
>>> -};
>>> -
>>> -unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
>>> --
>>> 1.7.0.4
>>>
>>> _______________________________________________
>>> uClinux-dev mailing list
>>> uClinux-dev at uclinux.org<mailto:uClinux-dev at uclinux.org>
>>> http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
>>> This message was resent by uclinux-dev at uclinux.org
>>> <mailto:uclinux-dev at uclinux.org>
>>> To unsubscribe see:
>>> http://mailman.uclinux.org/mailman/options/uclinux-dev
>>>
>>>
>>>
>>>
>>> --
>>> ______
>>> Mohamed Nabil Hafez
>>> Embedded Software Engineer
>>>
>>
>>
>> --
>> ------------------------------------------------------------------------
>> Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
>> SnapGear Group, McAfee PHONE: +61 7 3435 2888
>> 8 Gardner Close, FAX: +61 7 3891 3630
>> Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com
>> _______________________________________________
>> uClinux-dev mailing list
>> uClinux-dev at uclinux.org
>> http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
>> This message was resent by uclinux-dev at uclinux.org To unsubscribe
>> see:
>> http://mailman.uclinux.org/mailman/options/uclinux-dev
>>
> ????&?~?&???+-?????w??????m?b??f??"??^n?r???z???h????&???G???h?(????j"???m?????z?????f???h???~?m?
>
>

--
------------------------------------------------------------------------
Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
SnapGear Group, McAfee PHONE: +61 7 3435 2888
8 Gardner Close, FAX: +61 7 3891 3630
Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com
_______________________________________________
uClinux-dev mailing list
uClinux-dev at uclinux.org
http://mailman.uclinux.org/mailman/listinfo/uclinux-dev
This message was resent by uclinux-dev at uclinux.org To unsubscribe see:
http://mailman.uclinux.org/mailman/options/uclinux-dev

mohamed nabil

2012-04-26 01:10:45 UTC

Permalink

Ah , Bloody Hell , we should punish this "reflecter"
but still 23 emails are too much for 1 bloody min ? no ?

On Thu, Apr 26, 2012 at 3:07 AM, Greg Ungerer <gerg at snapgear.com> wrote:

> Hi Alex,
>
>
> On 04/26/2012 10:53 AM, Alex LI wrote:
>
>> You sent 50 mails in 1 min.
>>
>
> I sent 23. And both list archives (linux-m68k and uclinux-dev) only
> show the 23 emails.
>
> Maybe the uclinux-dev reflecter is sending dupes to list recpients?
>
> Regards
> Greg
>
>
>
> Sent from my Sony Ericsson Xperia arc S
>>
>> Greg Ungerer<gerg at snapgear.com> ?:
>>
>>
>> On 04/26/2012 10:36 AM, mohamed nabil wrote:
>>>
>>>> that's a Fucking spam man !!
>>>>
>>>
>>> Huh?
>>>
>>> Thats how open source development works. If you don't like it don't
>>> subscribe to a developers list.
>>>
>>> Regards
>>> Greg
>>>
>>>
>>>
>>> On Thu, Apr 26, 2012 at 2:26 AM,<gerg at snapgear.com
>>>> <mailto:gerg at snapgear.com>> wrote:
>>>>
>>>> From: Greg Ungerer<gerg at uclinux.org<**mailto:gerg at uclinux.org>>
>>>>
>>>> The GPIO data struct setup is now the only remaining code in the
>>>> platform
>>>> gpio.c file. So move it to the platform config.c code and remove the
>>>> gpio.c
>>>> file.
>>>>
>>>> Signed-off-by: Greg Ungerer<gerg at uclinux.org<**mailto:
>>>> gerg at uclinux.org>>
>>>> ---
>>>> arch/m68k/platform/532x/**Makefile | 2 +-
>>>> arch/m68k/platform/532x/**config.c | 25 ++++++++++++++++++++++
>>>> arch/m68k/platform/532x/gpio.c | 43
>>>> ------------------------------**--------
>>>> 3 files changed, 26 insertions(+), 44 deletions(-)
>>>> delete mode 100644 arch/m68k/platform/532x/gpio.c
>>>>
>>>> diff --git a/arch/m68k/platform/532x/**Makefile
>>>> b/arch/m68k/platform/532x/**Makefile
>>>> index ce01669..c0d8cf8 100644
>>>> --- a/arch/m68k/platform/532x/**Makefile
>>>> +++ b/arch/m68k/platform/532x/**Makefile
>>>> @@ -15,4 +15,4 @@
>>>> asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
>>>>
>>>> #obj-y := config.o usb-mcf532x.o spi-mcf532x.o
>>>> -obj-y := config.o gpio.o
>>>> +obj-y := config.o
>>>> diff --git a/arch/m68k/platform/532x/**config.c
>>>> b/arch/m68k/platform/532x/**config.c
>>>> index 2bec347..a4dd3d8 100644
>>>> --- a/arch/m68k/platform/532x/**config.c
>>>> +++ b/arch/m68k/platform/532x/**config.c
>>>> @@ -26,10 +26,35 @@
>>>> #include<asm/mcfsim.h>
>>>> #include<asm/mcfuart.h>
>>>> #include<asm/mcfdma.h>
>>>> +#include<asm/mcfgpio.h>
>>>> #include<asm/mcfwdebug.h>
>>>>
>>>> /***************************************************************
>>>> ****************/
>>>>
>>>> +struct mcf_gpio_chip mcf_gpio_chips[] = {
>>>> + MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR,
>>>> MCFEPORT_EPPDR),
>>>> + MCFGPF(FECH, 8, 8),
>>>> + MCFGPF(FECL, 16, 8),
>>>> + MCFGPF(SSI, 24, 5),
>>>> + MCFGPF(BUSCTL, 32, 4),
>>>> + MCFGPF(BE, 40, 4),
>>>> + MCFGPF(CS, 49, 5),
>>>> + MCFGPF(PWM, 58, 4),
>>>> + MCFGPF(FECI2C, 64, 4),
>>>> + MCFGPF(UART, 72, 8),
>>>> + MCFGPF(QSPI, 80, 6),
>>>> + MCFGPF(TIMER, 88, 4),
>>>> + MCFGPF(LCDDATAH, 96, 2),
>>>> + MCFGPF(LCDDATAM, 104, 8),
>>>> + MCFGPF(LCDDATAL, 112, 8),
>>>> + MCFGPF(LCDCTLH, 120, 1),
>>>> + MCFGPF(LCDCTLL, 128, 8),
>>>> +};
>>>> +
>>>> +unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
>>>> +
>>>> +/**************************************************************
>>>> *****************/
>>>> +
>>>> #ifdef CONFIG_SPI_COLDFIRE_QSPI
>>>>
>>>> static void __init m532x_qspi_init(void)
>>>> diff --git a/arch/m68k/platform/532x/**gpio.c
>>>> b/arch/m68k/platform/532x/**gpio.c
>>>> deleted file mode 100644
>>>> index 3e1b71d..0000000
>>>> --- a/arch/m68k/platform/532x/**gpio.c
>>>> +++ /dev/null
>>>> @@ -1,43 +0,0 @@
>>>> -/*
>>>> - * Coldfire generic GPIO support
>>>> - *
>>>> - * (C) Copyright 2009, Steven King<sfking at fdwdc.com
>>>> <mailto:sfking at fdwdc.com>>
>>>> - *
>>>> - * This program is free software; you can redistribute it and/or
>>>> modify
>>>> - * it under the terms of the GNU General Public License as
>>>> published by
>>>> - * the Free Software Foundation; version 2 of the License.
>>>> - *
>>>> - * This program is distributed in the hope that it will be useful,
>>>> - * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>>> - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>>> - * GNU General Public License for more details.
>>>> -*/
>>>> -
>>>> -#include<linux/kernel.h>
>>>> -#include<linux/init.h>
>>>> -
>>>> -#include<asm/coldfire.h>
>>>> -#include<asm/mcfsim.h>
>>>> -#include<asm/mcfgpio.h>
>>>> -
>>>> -struct mcf_gpio_chip mcf_gpio_chips[] = {
>>>> - MCFGPS(PIRQ, 0, 8, MCFEPORT_EPDDR, MCFEPORT_EPDR,
>>>> MCFEPORT_EPPDR),
>>>> - MCFGPF(FECH, 8, 8),
>>>> - MCFGPF(FECL, 16, 8),
>>>> - MCFGPF(SSI, 24, 5),
>>>> - MCFGPF(BUSCTL, 32, 4),
>>>> - MCFGPF(BE, 40, 4),
>>>> - MCFGPF(CS, 49, 5),
>>>> - MCFGPF(PWM, 58, 4),
>>>> - MCFGPF(FECI2C, 64, 4),
>>>> - MCFGPF(UART, 72, 8),
>>>> - MCFGPF(QSPI, 80, 6),
>>>> - MCFGPF(TIMER, 88, 4),
>>>> - MCFGPF(LCDDATAH, 96, 2),
>>>> - MCFGPF(LCDDATAM, 104, 8),
>>>> - MCFGPF(LCDDATAL, 112, 8),
>>>> - MCFGPF(LCDCTLH, 120, 1),
>>>> - MCFGPF(LCDCTLL, 128, 8),
>>>> -};
>>>> -
>>>> -unsigned int mcf_gpio_chips_size = ARRAY_SIZE(mcf_gpio_chips);
>>>> --
>>>> 1.7.0.4
>>>>
>>>> ______________________________**_________________
>>>> uClinux-dev mailing list
>>>> uClinux-dev at uclinux.org<**mailto:uClinux-dev at uclinux.org**>
>>>> http://mailman.uclinux.org/**mailman/listinfo/uclinux-dev<http://mailman.uclinux.org/mailman/listinfo/uclinux-dev>
>>>> This message was resent by uclinux-dev at uclinux.org
>>>> <mailto:uclinux-dev at uclinux.**org <uclinux-dev at uclinux.org>>
>>>> To unsubscribe see:
>>>> http://mailman.uclinux.org/**mailman/options/uclinux-dev<http://mailman.uclinux.org/mailman/options/uclinux-dev>
>>>>
>>>>
>>>>
>>>>
>>>> --
>>>> ______
>>>> Mohamed Nabil Hafez
>>>> Embedded Software Engineer
>>>>
>>>>
>>>
>>> --
>>> ------------------------------**------------------------------**
>>> ------------
>>> Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
>>> SnapGear Group, McAfee PHONE: +61 7 3435 2888
>>> 8 Gardner Close, FAX: +61 7 3891 3630
>>> Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com
>>> ______________________________**_________________
>>> uClinux-dev mailing list
>>> uClinux-dev at uclinux.org
>>> http://mailman.uclinux.org/**mailman/listinfo/uclinux-dev<http://mailman.uclinux.org/mailman/listinfo/uclinux-dev>
>>> This message was resent by uclinux-dev at uclinux.org
>>> To unsubscribe see:
>>> http://mailman.uclinux.org/**mailman/options/uclinux-dev<http://mailman.uclinux.org/mailman/options/uclinux-dev>
>>>
>>> ??? ?&?~?&? ??+-??? ??w??????m?b??f??"??^n?r???z? ??h????&?? ?G???h?
>> (????j"?? ? m?????z?????f???h???~?m?
>>
>>
>>
>
> --
> ------------------------------**------------------------------**
> ------------
> Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
> SnapGear Group, McAfee PHONE: +61 7 3435 2888
> 8 Gardner Close, FAX: +61 7 3891 3630
> Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com
>

--
______
Mohamed Nabil Hafez
Embedded Software Engineer
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Ezequiel García

2012-04-27 17:26:15 UTC

Permalink

Hi,

On Wed, Apr 25, 2012 at 10:10 PM, mohamed nabil <m.nabil.hafez at gmail.com> wrote:
> Ah , Bloody Hell , we should punish this "reflecter"
> but still 23 emails are too much for 1 bloody min ? ?no ?
>

Personally, I care more about people *not* top-posting and *not*
sending html mails, than in getting 100 mails in 1 second, since any
modern client can filter that.

Just a thought.

Ezequiel.

Steven King

2012-04-26 07:28:47 UTC

Permalink

On Wednesday 25 April 2012 5:25:40 pm gerg at snapgear.com wrote:
> The GPIO init code for the ColdFire cores is a set of very large tables,
> one for each ColdFire SoC type. Each SoC type has very different GPIO pin
> arrangements, so one for each is unavoidable. But there is fundamentaly
> two types of setup/access that we are trying to support.
>
> With some pre-processor macro magic we can reduce the tables significantly,
> making them easier to read, easier to get correct, and easier to maintain.
>
> The following patches implement a set of simplifying changes. What do
> others think? Overall we remove close to 2000 lines of code, and the end
> tables are much easier to read and get correct.
>

Hi Greg,

This looks fine to me.
You can add my Acked-by: Steven King <sfking at fdwdc.com>

Greg Ungerer

2012-04-26 10:02:29 UTC

Permalink

Hi Steven,

On 04/26/2012 05:28 PM, Steven King wrote:
> On Wednesday 25 April 2012 5:25:40 pm gerg at snapgear.com wrote:
>> The GPIO init code for the ColdFire cores is a set of very large tables,
>> one for each ColdFire SoC type. Each SoC type has very different GPIO pin
>> arrangements, so one for each is unavoidable. But there is fundamentaly
>> two types of setup/access that we are trying to support.
>>
>> With some pre-processor macro magic we can reduce the tables significantly,
>> making them easier to read, easier to get correct, and easier to maintain.
>>
>> The following patches implement a set of simplifying changes. What do
>> others think? Overall we remove close to 2000 lines of code, and the end
>> tables are much easier to read and get correct.
>>
>
> Hi Greg,
>
> This looks fine to me.
> You can add my Acked-by: Steven King<sfking at fdwdc.com>

Great, thanks.

Regards
Greg

------------------------------------------------------------------------
Greg Ungerer -- Principal Engineer EMAIL: gerg at snapgear.com
SnapGear Group, McAfee PHONE: +61 7 3435 2888
8 Gardner Close, FAX: +61 7 3891 3630
Milton, QLD, 4064, Australia WEB: http://www.SnapGear.com