[uClinux-dev] [PATCH 0/5] m68knommu: fix define formating in some ColdFire headers

[gerg]

Reformat broken tab alignment on some defines. This makes the format
mostly consistent in these files.

---
arch/m68k/include/asm/m523xsim.h | 18 +++++++++---------
arch/m68k/include/asm/m5272sim.h | 7 ++++---
arch/m68k/include/asm/m527xsim.h | 34 +++++++++++++++++-----------------
arch/m68k/include/asm/m5307sim.h | 12 ++++++------
arch/m68k/include/asm/m5407sim.h | 12 ++++++------
5 files changed, 42 insertions(+), 41 deletions(-)

[gerg]

From: Greg Ungerer <gerg at uclinux.org>

Fix tab broken address defines to be consistent with others in this file.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/include/asm/m527xsim.h | 34 +++++++++++++++++-----------------
1 files changed, 17 insertions(+), 17 deletions(-)

diff --git a/arch/m68k/include/asm/m527xsim.h b/arch/m68k/include/asm/m527xsim.h
index 6335e42..1bebbe7 100644
--- a/arch/m68k/include/asm/m527xsim.h
+++ b/arch/m68k/include/asm/m527xsim.h
@@ -184,15 +184,15 @@
/*
* Generic GPIO support
*/
-#define MCFGPIO_PODR MCFGPIO_PODR_ADDR
-#define MCFGPIO_PDDR MCFGPIO_PDDR_ADDR
-#define MCFGPIO_PPDR MCFGPIO_PPDSDR_ADDR
-#define MCFGPIO_SETR MCFGPIO_PPDSDR_ADDR
-#define MCFGPIO_CLRR MCFGPIO_PCLRR_ADDR
+#define MCFGPIO_PODR MCFGPIO_PODR_ADDR
+#define MCFGPIO_PDDR MCFGPIO_PDDR_ADDR
+#define MCFGPIO_PPDR MCFGPIO_PPDSDR_ADDR
+#define MCFGPIO_SETR MCFGPIO_PPDSDR_ADDR
+#define MCFGPIO_CLRR MCFGPIO_PCLRR_ADDR

-#define MCFGPIO_PIN_MAX 100
-#define MCFGPIO_IRQ_MAX 8
-#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
+#define MCFGPIO_PIN_MAX 100
+#define MCFGPIO_IRQ_MAX 8
+#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE

/*
* Port Pin Assignment registers.
@@ -293,15 +293,15 @@
/*
* Generic GPIO support
*/
-#define MCFGPIO_PODR MCFGPIO_PODR_BUSCTL
-#define MCFGPIO_PDDR MCFGPIO_PDDR_BUSCTL
-#define MCFGPIO_PPDR MCFGPIO_PPDSDR_BUSCTL
-#define MCFGPIO_SETR MCFGPIO_PPDSDR_BUSCTL
-#define MCFGPIO_CLRR MCFGPIO_PCLRR_BUSCTL
-
-#define MCFGPIO_PIN_MAX 148
-#define MCFGPIO_IRQ_MAX 8
-#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
+#define MCFGPIO_PODR MCFGPIO_PODR_BUSCTL
+#define MCFGPIO_PDDR MCFGPIO_PDDR_BUSCTL
+#define MCFGPIO_PPDR MCFGPIO_PPDSDR_BUSCTL
+#define MCFGPIO_SETR MCFGPIO_PPDSDR_BUSCTL
+#define MCFGPIO_CLRR MCFGPIO_PCLRR_BUSCTL
+
+#define MCFGPIO_PIN_MAX 148
+#define MCFGPIO_IRQ_MAX 8
+#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE

/*
* Port Pin Assignment registers.

[gerg]

From: Greg Ungerer <gerg at uclinux.org>

Fix tab broken address defines to be consistent with others in this file.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/include/asm/m523xsim.h | 18 +++++++++---------
1 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/arch/m68k/include/asm/m523xsim.h b/arch/m68k/include/asm/m523xsim.h
index d1d4ec7..5e06b4e 100644
--- a/arch/m68k/include/asm/m523xsim.h
+++ b/arch/m68k/include/asm/m523xsim.h
@@ -176,15 +176,15 @@
/*
* Generic GPIO support
*/
-#define MCFGPIO_PODR MCFGPIO_PODR_ADDR
-#define MCFGPIO_PDDR MCFGPIO_PDDR_ADDR
-#define MCFGPIO_PPDR MCFGPIO_PPDSDR_ADDR
-#define MCFGPIO_SETR MCFGPIO_PPDSDR_ADDR
-#define MCFGPIO_CLRR MCFGPIO_PCLRR_ADDR
-
-#define MCFGPIO_PIN_MAX 107
-#define MCFGPIO_IRQ_MAX 8
-#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE
+#define MCFGPIO_PODR MCFGPIO_PODR_ADDR
+#define MCFGPIO_PDDR MCFGPIO_PDDR_ADDR
+#define MCFGPIO_PPDR MCFGPIO_PPDSDR_ADDR
+#define MCFGPIO_SETR MCFGPIO_PPDSDR_ADDR
+#define MCFGPIO_CLRR MCFGPIO_PCLRR_ADDR
+
+#define MCFGPIO_PIN_MAX 107
+#define MCFGPIO_IRQ_MAX 8
+#define MCFGPIO_IRQ_VECBASE MCFINT_VECBASE

/*
* Pin Assignment

[gerg]

From: Greg Ungerer <gerg at uclinux.org>

Fix tab broken address defines to be consistent with others in this file.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/include/asm/m5307sim.h | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/m68k/include/asm/m5307sim.h b/arch/m68k/include/asm/m5307sim.h
index a8e7519..5d0bb7e 100644
--- a/arch/m68k/include/asm/m5307sim.h
+++ b/arch/m68k/include/asm/m5307sim.h
@@ -127,9 +127,9 @@
/*
* Generic GPIO support
*/
-#define MCFGPIO_PIN_MAX 16
-#define MCFGPIO_IRQ_MAX -1
-#define MCFGPIO_IRQ_VECBASE -1
+#define MCFGPIO_PIN_MAX 16
+#define MCFGPIO_IRQ_MAX -1
+#define MCFGPIO_IRQ_VECBASE -1


/* Definition offset address for CS2-7 -- old mask 5307 */
@@ -167,9 +167,9 @@
/*
* Defines for the IRQPAR Register
*/
-#define IRQ5_LEVEL4 0x80
-#define IRQ3_LEVEL6 0x40
-#define IRQ1_LEVEL2 0x20
+#define IRQ5_LEVEL4 0x80
+#define IRQ3_LEVEL6 0x40
+#define IRQ1_LEVEL2 0x20

/*
* Define system peripheral IRQ usage.

[gerg]

From: Greg Ungerer <gerg at uclinux.org>

Fix tab broken defines to be consistent with others in this file.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/include/asm/m5272sim.h | 7 ++++---
1 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/m68k/include/asm/m5272sim.h b/arch/m68k/include/asm/m5272sim.h
index 52d1a33..1fb01bb 100644
--- a/arch/m68k/include/asm/m5272sim.h
+++ b/arch/m68k/include/asm/m5272sim.h
@@ -132,8 +132,9 @@
/*
* Generic GPIO support
*/
-#define MCFGPIO_PIN_MAX 48
-#define MCFGPIO_IRQ_MAX -1
-#define MCFGPIO_IRQ_VECBASE -1
+#define MCFGPIO_PIN_MAX 48
+#define MCFGPIO_IRQ_MAX -1
+#define MCFGPIO_IRQ_VECBASE -1
+
/****************************************************************************/
#endif /* m5272sim_h */

[gerg]

From: Greg Ungerer <gerg at uclinux.org>

Fix tab broken address defines to be consistent with others in this file.

Signed-off-by: Greg Ungerer <gerg at uclinux.org>
---
arch/m68k/include/asm/m5407sim.h | 12 ++++++------
1 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/m68k/include/asm/m5407sim.h b/arch/m68k/include/asm/m5407sim.h
index cc485ba..a7550bc 100644
--- a/arch/m68k/include/asm/m5407sim.h
+++ b/arch/m68k/include/asm/m5407sim.h
@@ -102,9 +102,9 @@
/*
* Generic GPIO support
*/
-#define MCFGPIO_PIN_MAX 16
-#define MCFGPIO_IRQ_MAX -1
-#define MCFGPIO_IRQ_VECBASE -1
+#define MCFGPIO_PIN_MAX 16
+#define MCFGPIO_IRQ_MAX -1
+#define MCFGPIO_IRQ_VECBASE -1

/*
* Some symbol defines for the above...
@@ -130,9 +130,9 @@
/*
* Defines for the IRQPAR Register
*/
-#define IRQ5_LEVEL4 0x80
-#define IRQ3_LEVEL6 0x40
-#define IRQ1_LEVEL2 0x20
+#define IRQ5_LEVEL4 0x80
+#define IRQ3_LEVEL6 0x40
+#define IRQ1_LEVEL2 0x20

/*
* Define system peripheral IRQ usage.